• Journal of the Korea Society for Simulation
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• v.11 no.4
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• pp.57-68
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• 2002

The analysis of the cyclic scheduling problem in FMS using the transitive matrix has been proposed. Since the transitive matrix may explain all the relations between the places and transitions, we propose an algorithm to get good solution after slicing off some subnets from the original net based on machines operations. For analyzing the schedule problem, we considered two time functions such as produce time and waiting time using the P-invariant. In addition, we are shown the effectiveness of proposed algorithm after comparing with unfolding algorithms.

• Journal of Korean Institute of Industrial Engineers
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• v.15 no.2
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• pp.1-10
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• 1989

This paper deals with a single-facility multiproduction model concerning the basic cyclic scheduling. The aim is to obtain the production order of each product in a cycle and the cycle frequency for minimizing the setup costs and inventory carrying costs of all products. The problem is formulated by LP and it shows that the optimal solution derived dominates the solution of non-cyclic scheduling model on some conditions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.4
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• pp.325-336
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• 2013

FlashLinQ, one of the typical D2D communication systems developed by Qualcomm, considers a single-tone communication based distributed channel-aware link scheduling method to realize the link scheduling process with low control overheads. However, considering the frequency selective fading effect of practical multi-path channel, the single-tone based SIR estimation causes a critical scheduling error problem because the received single-tone signal has quite different channel gain at each sub-carrier location. In order to overcome this problem, we propose a novel link scheduling method based on CAZAC (Constant Amplitude Zero Auto-Correlation) sequence for D2D communication system. In the proposed method, each link has a unique offset value set for the generation of CAZAC sequences. CAZAC sequences with the cyclic offsets are transmitted using multiple sub-blocks in the entire bandwidth, and then each device can obtain nearly full-band SIR using a good cyclic cross-correlation property of CAZAC sequence.

• 제어로봇시스템학회:학술대회논문집
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• 1990.10b
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• pp.1250-1255
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• 1990

This paper discusses an optimal cyclic scheduling problem for a FMC (Flexible Manufacturing Cell) modeled by a two-machine flowshop with two machining centers with APC's (Automated Pallet Changers), an AGV (Automated Guided Vehicle) and loading and unloading stations. Cyclic production in which similar patterns of production is repeated can significantly reduce the production lead-time and WIP (Work-In-Process) in such flexible, automated system. Thus we want to find an optimal cyclic schedule that minimizes the cycle time in each cycle. However, the existence of APC's as buffer storage for WIP makes the problem intractable (i.e., NP-complete). We propose an practical approximation algorithm that minimizes, instead of each cycle time, its upper bound. Performances of this algorithm are validated by the way of computer simulations.

• Journal of Institute of Control, Robotics and Systems
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• v.7 no.4
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• pp.344-350
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• 2001

In this paper, we are focused on the analysis of acyclic schedule for the determination of the opti-mal cycle time and minimization of work in process. Especially, this paper deals with the product ratio-driven cyclic scheduling problem in FMS with different products and ratio using the TPN(Time Petri Nets)un-folding.

• Journal of Korea Society of Industrial Information Systems
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• v.1 no.1
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• pp.29-62
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• 1996

In this paper, the problem of determining cyclic schedules for a material handling hoist in the printed-circuit-board(PCB) electroplating line is considered. The objective of this research is to determine an optimal simple-cycle schedule of the hoist which in turn maximizes the line throughput rate. Previous approaches to the cyclic hoist scheduling problem are all mathematical programming-based approaches to develop cyclic schedules(Mixed Integer Programming, Linear Programming based Branch and Bound, Branch and Bound Search Method and so on). In this paper, a genetic algorithm-based approach for a single hoist scheduling in the PCB electroplating line is described. Through some experiments for the well known example data and randomly generated data, the proposed algorithm is shown to be more efficient than the previous mathematical programming-based algorithm.

• Proceedings of the KSR Conference
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• 1999.11a
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• pp.46-53
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• 1999

As of July 1999, i,185 lomocotives(excluding metropolitan area electric locomotives) are in Korean National Railroad(KNR). With this limited number of resources assigning locomotives to each trains of timetable is very important in the entire railway management point of view because schedule can be regarded as goods in transportation industry. On a simple rail network, it is rather easier to assign proper locomotives to trains with the experience of operating experts and get optimal assignment solution. However, as the network is getting bigger and complicated, the number of trains and corresponding locomotives will be dramatically increased to rover all the demands required to service all of the trains in timetable. There will be also numerous operational constraints to be considered. Assigning proper locomotives to trains and building optimal cyclic rotations of locomotive routings will result in increasing efficiency of schedule and giving a guarantee of more profit. The purpose of this study is two fold: (1) we consider a planning-level locomotive scheduling problem with the objective of minimizing the wasting cost under various practical constraints and (2) development of implementation prototype program of its assigning result. Not like other countries, i.e. Canada, Sweden, Korean railroad operates on n daily schedule basis. The objective is to find optimal assignment of locomotives of different types to each trains, which minimize the wasting cost. This problem is defined on a planning stage and therefore, does not consider operational constraints such as maintenance and emergency cases. Due to the large scale of the problem size and complexity, we approach with heuristic methods and column generation to find optimal solution. The locomotive scheduling prototype consists of several modules including database, optimization engine and diagram generator. The optimization engine solves MIP model and provides an optimal locomotive schedule using specified optimization algorithms. A cyclic locomotive route diagram can be generated using this optimal schedule through the diagram generator.

• Proceedings of the Korea Committee for Ocean Resources and Engineering Conference
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• 2004.05a
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• pp.61-66
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• 2004

In this paper an effort is made to develop an innovative spatial arrangement concept pertaining to ship building industry. The spatial scheduling is the problem that concentrates on effective planning of available space and arrangements of blocks and in a priority manner. In order to create an effective spatial scheduling. a database providing the priority has to be available to make the erection sequence. Such a system works hand in hand with erection sequence generator program The erection sequence program works on the conventional network analysis method which uses a typical parent-children idea for the calculation of the ENT(possible earliest network start time) and LNT(possible latest network start time). This program works in a cyclic manner taking turns by calculating the ENT in upward trace and LNT on the return trace thereby generating the entire erection sequence diagram for the requisite problem The generated database serves as an input data for spatial scheduling problem. When the system works it takes into consideration the entire system based on heuristic concepts as mentioned. There system uses the spatial aspects such as the available area of the P. E area and plan area of the corresponding blocks and its priority of erection from the erection sequence generator program develops the spatial scheduling arrangement. In this paper using all these concepts an innovative spatial schedule development system developed.

• Journal of Computing Science and Engineering
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• v.7 no.1
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• pp.67-80
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• 2013

The worst-case execution time (WCET) of each real-time task in multicore processors with shared caches can be significantly affected by inter-thread cache interferences. The worst-case inter-thread cache interferences are dependent on how tasks are scheduled to run on different cores. Therefore, there is a circular dependence between real-time task scheduling, the worst-case inter-thread cache interferences, and WCET in multicore processors, which is not the case for single-core processors. To address this challenging problem, we present an offline real-time scheduling approach for multicore processors by considering the worst-case inter-thread interferences on shared L2 caches. Our scheduling approach uses a greedy heuristic to generate safe schedules while minimizing the worst-case inter-thread shared L2 cache interferences and WCET. The experimental results demonstrate that the proposed approach can reduce the utilization of the resulting schedule by about 12% on average compared to the cyclic multicore scheduling approaches in our theoretical model. Our evaluation indicates that the enhanced scheduling approach is more likely to generate feasible and safe schedules with stricter timing constraints in multicore real-time systems.

• Journal of KIISE:Software and Applications
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• v.34 no.5
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• pp.487-501
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• 2007

To achieve high resource utilization for multi-issue DSPs, production compiler commonly includes variants of iterative modulo scheduling algorithm. However, excessive cyclic data dependences, which exist in communication and media processing loops, unduly restrict modulo scheduling freedom. As a result, replicated functional units in multi-issue DSPs are often under-utilized. To address this resource under-utilization problem, our paper describes a novel compiler preprocessing strategy for effective modulo scheduling. The preprocessing strategy proposed capitalizes on two new transformations, which are referred to as cloning and dismantling. Our preprocessing strategy has been validated by an implementation for StarCore SC140 DSP compiler.