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Preprocessing Methods for Effective Modulo Scheduling on High Performance DSPs  

Cho, Doo-San (서울대학교 전기공학과)
Paek, Yun-Heung (서울대학교 전기컴퓨터공학부)
Publication Information
Journal of KIISE:Software and Applications / v.34, no.5, 2007 , pp. 487-501 More about this Journal
Abstract
To achieve high resource utilization for multi-issue DSPs, production compiler commonly includes variants of iterative modulo scheduling algorithm. However, excessive cyclic data dependences, which exist in communication and media processing loops, unduly restrict modulo scheduling freedom. As a result, replicated functional units in multi-issue DSPs are often under-utilized. To address this resource under-utilization problem, our paper describes a novel compiler preprocessing strategy for effective modulo scheduling. The preprocessing strategy proposed capitalizes on two new transformations, which are referred to as cloning and dismantling. Our preprocessing strategy has been validated by an implementation for StarCore SC140 DSP compiler.
Keywords
compiler; software pipelining; high performance multi-issue DSP; iterative modulo scheduling;
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