• Journal of information and communication convergence engineering
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• v.19 no.4
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• pp.263-268
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• 2021

Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.658-661
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• 2002

An analog multiplier-divider circuit that realized through the use of OTAs, which does not require external passive circuit elements and temperature compensated, is proposed in this paper. Since the scheme is realized in such a way that employs only OTA as a standard cell, the circuit is simple and can be easily constructed from commercially available IC. The circuit bandwidth is wide and close to the transistor f$\sub$T/. Simulation results that demonstrate the performances of the multiplier-divider circuit are included.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.11a
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• pp.278-281
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• 1999

In this paper, Squential circuit was implemented by decision diagram that can analyze and test large amount of functions easily. First of all, Memery device of multiple valued squential circuit was used D F/F, implemented with CMOS current mode. The opreation property of this circuit involved by PSPICE simulation. The result of Decision Diagram sequential circuit is simple and regular for selecting wire routing and posesses the property of analyze, testing. so it suitable for VLSI implementation.

• 제어로봇시스템학회:학술대회논문집
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• 1993.10a
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• pp.1219-1226
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• 1993

A buck-boost zero current switched(ZCS) series resonant AC to DC converter for the DC output voltage regulation together with high power factor is proposed. The proposed single phase AC to DC converter enables a zero current switching operation of all the power devices allowing the circuit to operate at high swtiching frequencies and high power levels. A dynamic model for this Ac to DC converter is developed and an analysis for the internal operational characteristics is explored. Based on this analysis, a switched discrete sliding mode control(SDSMC) technique is investigated and its advantages over the other types of current control techniques are discussed. With the proposed control technique, the unity power factor without a current overshoot and a wide range of output voltage can be obtained.

• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.518-521
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• 1998

This paper describes a 3.3V-65MHz 12BIT CMOS current-mode DAC designed with a 8 MSB current matirx stage and a 4 LSB binary weighting stage. The linearity errors caused by a voltage drop of the ground line and a threshold voltage mismatch of transistors have been reduced by the symmetrical routing method with ground line and the tree structure bias circuit, respectively. In order to realize a low glitch energy, a cascode current switch ahs been employed. The simulation results of the designed DAC show a coversion rate of 65MHz, a powr dissipation of 71.7mW, a DNL of .+-.0.2LSB and an INL of .+-.0.8LSB with a single powr supply of 3.3V for a CMOS 0.6.mu.m n-well technology.

• Proceedings of the KIPE Conference
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• 2010.11a
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• pp.363-364
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• 2010

Most LED drivers uses current control method to adjust LED current. Using AC power grid such as off-line converter, Buck topology is popular because input voltage of LED driver is much higher than LED output voltage. Normally DCM current control is more popular than CCM current mode control in the range of below 50W, But DCM characteristics are dependent on the input voltage variation. This paper deals with what should be considered in DCM for LED driver with valley fill circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.141-145
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• 1998

This paper CMOS full adder design method based on carry-propagation-free addition trees and a circuit technique, so called multiple-valued current-mode (MVCM) circuits. The carry-paopagation-free addition method uses a redundant digit sets called redundant positive-digit number representations. The carry-propagation-free addition is by three steps, and the adder can be designed directly and efficiently from the algorithm using MVCM circuit. We demonstrate the effectiveness of the proposed method through simulation(SPICE).

• Proceedings of the KIEE Conference
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• 1989.07a
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• pp.604-607
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• 1989

In this paper, the commutating devices of the forced commutating circuit and the relation between load current and source voltage are theoretically analyzed, by this approach commutating condition is considered. As a result some basic design methodes of commutating circuit are presented, whitch commutating loss becomes low and commutating failure is not occured.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.977.2-980
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• 1993

The fuzzifier circuit DPFC 7 is presented. Its features are: programmable membership function, CMOS digital interface, analog and current mode internal processing and integrability without external components. It has been designed to obtain a basic efficient block for fuzzy processing, to be included in a future architecture.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.4
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• pp.347-355
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• 2005

In this paper, a new continuous~time small signal model of an average current mode control is proposed. Sampling effect Is considered to obtain the proposed small signal model. By the proposed model, the high frequency response characteristics of current loop gain might be predicted accurately compared to previous models. And this leads the prediction of inductor current response of the proposed model to be accurate compared to others. In order to show the usefulness of the proposed model, prediction results of the proposed model are compared to those of the circuit level simulator, PSIM and experiment.