• 제목/요약/키워드: Current-Mode Circuit

검색결과 642건 처리시간 0.024초

Compact Capacitance Model of L-Shape Tunnel Field-Effect Transistors for Circuit Simulation

  • Yu, Yun Seop;Najam, Faraz
    • Journal of information and communication convergence engineering
    • /
    • 제19권4호
    • /
    • pp.263-268
    • /
    • 2021
  • Although the compact capacitance model of point tunneling types of tunneling field-effect transistors (TFET) has been proposed, those of line tunneling types of TFETs have not been reported. In this study, a compact capacitance model of an L-shaped TFET (LTFET), a line tunneling type of TFET, is proposed using the previously developed surface potentials and current models of P- and L-type LTFETs. The Verilog-A LTFET model for simulation program with integrated circuit emphasis (SPICE) was also developed to verify the validation of the compact LTFET model including the capacitance model. The SPICE simulation results using the Verilog-A LTFET were compared to those obtained using a technology computer-aided-design (TCAD) device simulator. The current-voltage characteristics and capacitance-voltage characteristics of N and P-LTFETs were consistent for all operational bias. The voltage transfer characteristics and transient response of the inverter circuit comprising N and P-LTFETs in series were verified with the TCAD mixed-mode simulation results.

A Simple Current-Mode Analog Multiplier-Divider Circuit Using OTAs

  • Surakampontorn, Wanlop;Kaewdang, Khanittha;Fongsamut, Chalermpan
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2002년도 ITC-CSCC -1
    • /
    • pp.658-661
    • /
    • 2002
  • An analog multiplier-divider circuit that realized through the use of OTAs, which does not require external passive circuit elements and temperature compensated, is proposed in this paper. Since the scheme is realized in such a way that employs only OTA as a standard cell, the circuit is simple and can be easily constructed from commercially available IC. The circuit bandwidth is wide and close to the transistor f$\sub$T/. Simulation results that demonstrate the performances of the multiplier-divider circuit are included.

  • PDF

결정도에 의한 다치 순차회로 구현 (Implementation of multiple valued squential circuit using decision diagram)

  • 김성대;김휘진;박춘명;송홍복
    • 한국정보통신학회:학술대회논문집
    • /
    • 한국해양정보통신학회 1999년도 추계종합학술대회
    • /
    • pp.278-281
    • /
    • 1999
  • 본 논문에서는 많은 함수를 용이하게 해석하고 테스트할 수 있는 결정도(Decision diagram)에 의한 다치순차논리회로(Multiple valued squential circuit)를 구현하였다 우선, 다치순차 회로의 기억소사는 D F/F를 이용하였으며 전류모드에 의한 결정도 순차 논리 회로를 구현한다 이 회로의 동자특성은 PSPICE 시뮬레이션을 통하여 확인하였다. 본 논문에서 제시한 전류모드 CMOS의 결정도 다치순차회로는 회선 경로 선택의 규칙성, 간단성, 여러함수를 쉽게 해석하고 테스트 할 수 있는 등등의 이점을 가지므로 VLSI화 실현에 적합할 것으로 생각된다.

  • PDF

영전류 스위칭 방식의 직렬 공진형 AC/DC 컨버터를 위한 전환모드 이산 슬라이딩 제어 (Switched discrete sliding mode control for ZCS series rosonant AC to DC converter)

  • 문건우;이정훈;이대식;윤명중
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
    • /
    • pp.1219-1226
    • /
    • 1993
  • A buck-boost zero current switched(ZCS) series resonant AC to DC converter for the DC output voltage regulation together with high power factor is proposed. The proposed single phase AC to DC converter enables a zero current switching operation of all the power devices allowing the circuit to operate at high swtiching frequencies and high power levels. A dynamic model for this Ac to DC converter is developed and an analysis for the internal operational characteristics is explored. Based on this analysis, a switched discrete sliding mode control(SDSMC) technique is investigated and its advantages over the other types of current control techniques are discussed. With the proposed control technique, the unity power factor without a current overshoot and a wide range of output voltage can be obtained.

  • PDF

3.3V-65MHz 12비트 CMOS 전류구동 D/A 변환기 설계 (A 3.3V-65MHz 12BIT CMOS current-mode digital to analog converter)

  • 류기홍;윤광섭
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 1998년도 하계종합학술대회논문집
    • /
    • pp.518-521
    • /
    • 1998
  • This paper describes a 3.3V-65MHz 12BIT CMOS current-mode DAC designed with a 8 MSB current matirx stage and a 4 LSB binary weighting stage. The linearity errors caused by a voltage drop of the ground line and a threshold voltage mismatch of transistors have been reduced by the symmetrical routing method with ground line and the tree structure bias circuit, respectively. In order to realize a low glitch energy, a cascode current switch ahs been employed. The simulation results of the designed DAC show a coversion rate of 65MHz, a powr dissipation of 71.7mW, a DNL of .+-.0.2LSB and an INL of .+-.0.8LSB with a single powr supply of 3.3V for a CMOS 0.6.mu.m n-well technology.

  • PDF

넓은 입력변화에서 불연속 전류 제어 모드로 동작하는 LED 드라이버 설계 (Design of LED Driver Operated in DCM mode for Wide Input Voltage Range)

  • 한수빈;박석인;송유진;정학근;정봉만;채수용
    • 전력전자학회:학술대회논문집
    • /
    • 전력전자학회 2010년도 추계학술대회
    • /
    • pp.363-364
    • /
    • 2010
  • Most LED drivers uses current control method to adjust LED current. Using AC power grid such as off-line converter, Buck topology is popular because input voltage of LED driver is much higher than LED output voltage. Normally DCM current control is more popular than CCM current mode control in the range of below 50W, But DCM characteristics are dependent on the input voltage variation. This paper deals with what should be considered in DCM for LED driver with valley fill circuit.

  • PDF

다치 논리를 이용한 PD 수 표현 다 입력 가산기 구현 (Implementation of PD number representation Multi-input Adder Using Multiple valued Logic)

  • 양대영;김휘진;송홍복
    • 한국정보통신학회:학술대회논문집
    • /
    • 한국해양정보통신학회 1998년도 추계종합학술대회
    • /
    • pp.141-145
    • /
    • 1998
  • This paper CMOS full adder design method based on carry-propagation-free addition trees and a circuit technique, so called multiple-valued current-mode (MVCM) circuits. The carry-paopagation-free addition method uses a redundant digit sets called redundant positive-digit number representations. The carry-propagation-free addition is by three steps, and the adder can be designed directly and efficiently from the algorithm using MVCM circuit. We demonstrate the effectiveness of the proposed method through simulation(SPICE).

  • PDF

다이오우드 브릿지형 듀얼 콘버어터의 강제전류 모우드의 동작해석 (The Analysis of Forced Commutating Mode by Diode - Bridge Type Dual Converter)

  • 김철우;김광태;황영문;권순재
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1989년도 하계종합학술대회 논문집
    • /
    • pp.604-607
    • /
    • 1989
  • In this paper, the commutating devices of the forced commutating circuit and the relation between load current and source voltage are theoretically analyzed, by this approach commutating condition is considered. As a result some basic design methodes of commutating circuit are presented, whitch commutating loss becomes low and commutating failure is not occured.

  • PDF

A VLSI-CMOS Programmable Membership Function Circuit: The Basic Block of Fuzzy Processing

  • Ruiz, Antonio;Gutierrez, Julio
    • 한국지능시스템학회:학술대회논문집
    • /
    • 한국퍼지및지능시스템학회 1993년도 Fifth International Fuzzy Systems Association World Congress 93
    • /
    • pp.977.2-980
    • /
    • 1993
  • The fuzzifier circuit DPFC 7 is presented. Its features are: programmable membership function, CMOS digital interface, analog and current mode internal processing and integrability without external components. It has been designed to obtain a basic efficient block for fuzzy processing, to be included in a future architecture.

  • PDF

평균전류모드제어를 이용하는 컨버터의 모델링 및 설계 (Modeling and Design of Average Current Mode Control)

  • 정영석
    • 전력전자학회논문지
    • /
    • 제10권4호
    • /
    • pp.347-355
    • /
    • 2005
  • 본 논문에서는 평균전류모드제어를 이용하는 컨버터의 연속시간 소신호 모델을 구한다. 평균전류모드제어에 일반적으로 사용되는 보상기를 적용한 컨버터의 해석을 위해 샘플러를 전류루프에 포함시켜 해석한다. 기존 모델에서는 정확히 해석하기 어려웠던 전류루프 이득의 고주파 영역 해석이 제안한 모델을 이용함으로 쉽게 해결할 수 있으며, 시스템의 안정성을 결정하는 고주파 영역에서의 주파수 응답 특성을 제안한 모델이 우수한 성능으로 예측 가능함을 보인다. 이를 위해 평균전류모드제어에서 전류루프에 샘플러가 포함된 모델을 제시하고 이 샘플러에 대한 연속시간 모델을 구하여 평균전류모드제어의 연속시간 모델을 구한다. 제안한 새로운 연속시간 소신호 모델을 이용한 예측 결과를 스위칭 모델 시뮬레이션 프로그램인 PSIM을 이용한 시뮬레이션 결과 및 실험결과와 비교하여 제안한 새로운 연속시간 소신호 모델의 우수성을 확인한다