• Title/Summary/Keyword: Current-Mode Circuit

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Design of 4Kb Poly-Fuse OTP IP for 90nm Process (90nm 공정용 4Kb Poly-Fuse OTP IP 설계)

  • Hyelin Kang;Longhua Li;Dohoon Kim;Soonwoo Kwon;Bushra Mahnoor;Panbong Ha;Younghee Kim
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.16 no.6
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    • pp.509-518
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    • 2023
  • In this paper, we designed a 4Kb poly-fuse OTP IP (Intellectual Property) required for analog circuit trimming and calibration. In order to reduce the BL resistance of the poly-fuse OTP cell, which consists of an NMOS select transistor and a poly-fuse link, the BL stacked metal 2 and metal 3. In order to reduce BL routing resistance, the 4Kb cells are divided into two sub-block cell arrays of 64 rows × 32 rows, with the BL drive circuit located between the two 2Kb sub-block cell arrays, which are split into top and bottom. On the other hand, in this paper, we propose a core circuit for an OTP cell that uses one poly-fuse link to one select transistor. In addition, in the early stages of OTP IP development, we proposed a data sensing circuit that considers the case where the resistance of the unprogrammed poly-fuse can be up to 5kΩ. It also reduces the current flowing through an unprogrammed poly-fuse link in read mode to 138㎂ or less. The poly-fuse OTP cell size designed with DB HiTek 90nm CMOS process is 11.43㎛ × 2.88㎛ (=32.9184㎛2), and the 4Kb poly-fuse OTP IP size is 432.442㎛ × 524.6㎛ (=0.227mm2).

Design of a CMOS Image Sensor Based on a Low Power Single-Slope ADC (저전력 Single-Slope ADC를 사용한 CMOS 이미지 센서의 설계)

  • Kwon, Hyuk-Bin;Kim, Dae-Yun;Song, Min-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.20-27
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    • 2011
  • A CMOS Image Sensor(CIS) mounted on mobile appliances always needs a low power consumption because of the battery life cycle. In this paper, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination, a low power single slope A/D converter with a novel comparator, and etc. Based on 0.13um CMOS process, the chip satisfies QVGA resolution($320{\times}240$ pixels) whose pitch is 2.25um and whose structure is 4-Tr active pixel sensor. From the experimental results, the ADC in the middle of CIS has a 10-b resolution, the operating speed of CIS is 16 frame/s, and the power dissipation is 25mW at 3.3V(Analog)/1.8V(Digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption is reduced approximately by 22% in sleep mode, 20% in operating mode.

Design of an Asynchronous eFuse One-Time Programmable Memory IP of 1 Kilo Bits Based on a Logic Process (Logic 공정 기반의 비동기식 1Kb eFuse OTP 메모리 IP 설계)

  • Lee, Jae-Hyung;Kang, Min-Cheol;Jin, Liyan;Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.7
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    • pp.1371-1378
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    • 2009
  • We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

Design of a CMOS D/A Converter for advanced wireless transceiver of high speed and high resolution (고속 고해상도의 무선통신 송 $\cdot$ 수신기용 CMOS D/A 변환기 설계)

  • Cho Hyun-Ho;Park Cheong-Yong;Yune Gun-Shik;Ha Sung-Min;Yoon Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.549-552
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    • 2004
  • The thesis describes the design of 12bit digital-to-analog converter (DAC) which shows the conversion rate of 500MHz and the power supply of 3.3V with 0.35${\mu}m$ CMOS 1-poly 4-metal process for advanced wireless transceiver of high speed and high resolution. The proposed DAC employes segmented structure which consists of 6bit MSB, 3bit mSB, 3bit LSB for area efficiency Also, using a optimized aspect ratio of process and new triple diagonal symmetric centroid sequence for high yield and high linearity. The proposed 12bit current mode DAC was employs new deglitch circuit for the decrement of the glitch energy. Simulation results show the conversion rate of 500MHz, and the power dissipation of 85mW at single 3.3V supply voltage. Both DNL and INL are found to be smaller than ${\pm}0.65LSB/{\pm}0.8LSB$.

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ZVS Operating Range Extension Method for High-Efficient High Frequency Linked ZVS-PWM DC-DC Power Converter

  • Sato S.;Moisseev S.;Nakaoka M.
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.227-230
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    • 2003
  • In this paper, a full bridge edge-resonant zero voltage mode based soft-switching PWM DC-DC power converter with a high frequency center tapped transformer link stage is presented from a practical point of view. The power MOSFETS operating as synchronous rectifier devices are implemented in the rectifier center tapped stage to reduce conduction power losses and also to extend the transformer primary side power MOSFETS ZVS commutation area from the rated to zero-load without a requirement of a magnetizing current. The steady-state operation of this phase-shift PWM controlled power converter is described in comparison with a conventional ZVS phase-shift PWM DC-DC converter using the diodes rectifier. Moreover, the experimental results of the switching power losses analysis are evaluated and discussed in this paper. The practical effectiveness of the ZVS phase-shift PWM DC-DC power converter treated here is actually proved by using 2.5kW-32kHz breadboard circuit. An actual efficiency of this converter is estimated in experiment and is achieved as 97$\%$ at maximum.

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High-Frequency Flyback Transformer Linked PWM Power Conditioner with An Active Switched Capacitor Snubber

  • Mun, Sang-Pil;Kim, Soo-Wook;Joo, Seok-Min;Park, Young-Jun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.7
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    • pp.7-15
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    • 2008
  • A single active capacitor snubber-assisted soft-switching sinewave pulse modulation utility-interactive power conditioner with a three-winding flyback high frequency transformer link and a bidirectional active power switch in its secondary side has been proposed. With the aid of the switched-capacitor quasi-resonant snubber cell, the high frequency switching devices in the primary side of the proposed DC-to-AC sinewave power inverter can be turned-off with ZVS commutation. In addition to this, the proposed power conditioner in the DCM can effectively take the advantages of ZCS turn-on commutation. Its output port is connected directly to the utility AC power source grid. At the end, the prototype of the proposed HF-UPC is built and tested in experiment. Its power conversion conditioning and processing circuit with a high frequency flyback transformer link is verified and the output sinewave current is qualified in accordance with the power quality guidelines of the utility AC interactive power systems.

A Study on the Uninterruptible Power Open Phase Compensation Device (무정전 결상 보상장치에 관한 연구)

  • Song, Young-Joo;Oh, Jin-Tack;Kim, Na-Un;Shin, Hye-Young
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.28 no.8
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    • pp.75-81
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    • 2014
  • It has been widely accepted that open phase may separate one of the power lines from power supply which is mainly caused by fuse melting, malfunction for source circuit breaker, contact failure, and disconnection under normal operating conditions, and is considered a kind of failure mode during disconnection of neutral wires as well. When open phase occurs, unequal voltage between phase might happen in the unbalanced load connected each phase, and further, depending on conditions of load, malfunction by providing low voltage. Moreover, load could be burned or overheated with overvoltage, which, in turn, can be a contributor to starting fires. Accordingly, in order to clearly overcome these problems, the current study aims to introduce the theory of uninterruptible power open phase compensation device, meaning that unbalanced power automatically restores balanced power and provides continuously the power supply without blackout, and verify it through simulation and experiments.

A Study on Isolated DC-DC Converter of DCM (절연형 DCM DC-DC 컨버터에 관한 연구)

  • Kwak, D.K.;Lee, B.S.;Kim, C.S.;Shim, J.S.;Yu, J.H.;Son, J.H.
    • Proceedings of the KIPE Conference
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    • 2010.07a
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    • pp.15-16
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    • 2010
  • This paper is study on a high efficiency DC-DC converter of discontinuous conduction mode (DCM) added electric isolation. The converters of high efficiency are generally made that the power losses of the used semiconductor switching devices is minimized. To achieve high efficiency system, the proposed converter is constructed by using a quasi resonant circuit. The control switches using in the converter are operated with soft switching by quasi resonant method. The control switches are operated without increasing their voltage and current stresses by the soft switching technology. The result is that the switching loss is very low and the efficiency of the system is high. The proposed converter is also added electric isolation which is used a pulse transformer. When the power conversion system is required electric isolation, the proposed converter is adopted with the converter system development of high efficiency. The soft switching operation and the system efficiency of the proposed converter are verified by digital simulation and experimental results.

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Modeling and Vibration Control of Small-sized Magneto-rheological Damper (소형 MR 댐퍼의 모델링 및 진동제어)

  • Lee, Jong-Woo;Seong, Min-Sang;Woo, Je-Kwan;Choi, Seung-Bok
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2012.10a
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    • pp.344-349
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    • 2012
  • This paper presents a new small-sized damper featuring magneto-rheological (MR) fluid which can be applied to vibration control system. The proposed MR damper consists of cylinder, piston, a couple of bearings, oil-seals and magnetic circuit which has two coils. In this damper, approximately 5cc of MR fluid is used. The damping force of the MR damper is designed to be followed by linear shear-mode Bingham-plastic model. In order to verify the performance of the MR damper, an experimental apparatus is established. In the experimental test, the damping force of the MR damper is measured with respect to time, displacement and velocity. In addition, the time response of MR damper is measured when 1A of step current is applied. Finally, The proposed small MR damper is applied to vibration control. In this process, a simple 1-DOF system is modeled and controlled using PID controller.

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Modeling and Vibration Control of Small-sized Magneto-rheological Damper (소형 MR 댐퍼의 모델링 및 진동제어)

  • Lee, Jong-Woo;Seong, Min-Sang;Woo, Je-Kwan;Choi, Seung-Bok
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.22 no.11
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    • pp.1121-1127
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    • 2012
  • This paper presents a new small-sized damper featuring magneto-rheological(MR) fluid which can be applied to vibration control system. The proposed MR damper consists of cylinder, piston, a couple of bearings, oil-seals and magnetic circuit which has two coils. In this damper, approximately 5cc of MR fluid is used. The damping force of the MR damper is designed to be followed by linear shear-mode Bingham-plastic model. In order to verify the performance of the MR damper, an experimental apparatus is established. In the experimental test, the damping force of the MR damper is measured with respect to time, displacement and velocity. In addition, the time response of MR damper is measured when 1A of step current is applied. Finally, the proposed small MR damper is applied to vibration control. In this process, a simple 1-DOF system is modeled and controlled using PID controller.