• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.3
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• pp.211-219
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• 2009

In this paper, a detailed analysis of zero current or zero voltage switching boost converter using a single switch is described. The proposed topology is capable of decreasing switching loss of IGBT device using soft switching technique. As a results, it can be reduced size and weight of passive elements. Based on the mode analysis, practical design considerations are presented. We confirm the converter topology, principle of operation and simulation results obtained from the PSIM software. The performance of the proposed converter is verified by with 1kW(400V, 2.5A) prototype circuit operated at 30kHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.88-94
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• 2011

In this paper, we design a 1-kb OTP (Onetime programmable) memory IP in consideration of BCD process based EM (Electro-migration) and resistance variations of eFuse. We propose a method of precharging BL to VSS before activation of RWL (Read word-line) and an optimized design of read NMOS transistor to reduce read current through a non-programmed cell. Also, we propose a sensing margin test circuit with a variable pull-up load out of consideration for resistance variations of programmed eFuse. Peak current through the non-programmed eFuse is reduced from 728 ${\mu}A$ to 61 ${\mu}A$ when a simulation is done in the read mode. Furthermore, BL (Bit-line) sensing is possible even if sensed resistance of eFuse has fallen by about 9 $k{\Omega}$ in a wafer read test through a variable pull-up load resistance of BL S/A (Sense amplifier).

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.1
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• pp.1-8
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• 2000

Switched reluctance motor(SRM) has simple magnetic structure, and requires simple power electronic driving circuit. It is very useful for wide range adjustable speed drive system. But, SRM drive generates large vibration and acoustic noise because it is commutated individually by step pulse m.m.f of each phase pole. In the vibration and acoustic noise characteristics. The considerable vibration and noise is induced by radial deforming of stator, so the frequency of dominant vibration and noise is coincident with the frequency of natural mode frequency of mechanical structure. This radial vibration force is generated in the phase commutation region. This paper suggests the new electromagnetic structure of SRM with auxiliary commutation winding which is excited by direct current. This phase and commutation winding are coupled magnetically between one phase winding and the other. Therefore, the switch-off phase current is absorbed by the another phase winding. By this interaction of phase and commutation winding in commutation mechanism, vibration and noise is reduced. And this reduction effect is examined by the test of prototype machine. As a result, SRM with DC exciting commutation winding is very useful to reduce vibration and acoustic noise.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.327-334
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• 2010

This paper deals with a single-phase dynamic voltage restorer(DVR) with a quasi Z-source topology. The proposed system based on a single-phase quasi Z-source PWM ac-ac converter which have features such as the input voltage and output voltage are sharing ground, and input current operates in continuous current mode(CCM). For the detection of voltage sag-swell, peak voltage detection method is applied. Also, the circuit principles of the proposed system are described. During the 60% severe voltage sag and 30% voltage swell, the proposed system controls the adding or missing voltage and maintains the rated voltage of sinusoidal waveform at the terminals of the critical loads. Finally, PSIM simulation and experimental results are presented to verify the proposed concept and theoretical analysis.

• Current Optics and Photonics
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• v.4 no.4
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• pp.373-379
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• 2020

In this study, we investigate terahertz (THz) generation by a photoconductive antenna with electrodes in the shape of split-ring resonators. According to our theoretical investigation based on a lumped-circuit model, the inductance of this electrode structure leads to resonant behavior of the photo-induced current. Hence, near the resonance frequency the spectral components generated by a resonant photoconductive antenna can be greater than those produced by a non-resonant one. For experimental verification, a resonant photoconductive antenna, which possesses a resonance mode at 0.6 THz, and a non-resonant photoconductive antenna with stripe-shaped electrodes were fabricated on a semi-insulating GaAs substrate. The THz generation by both of the photoconductive antennas demonstrated a good agreement with the theoretically expected results. The observed relationship between the resonant electrodes of the photoconductive antenna and the generated THz spectrum can be further employed to design a narrow-band THz source with an on-demand frequency.

• Journal of IKEEE
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• v.22 no.3
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• pp.842-845
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• 2018

In this paper, we propose low-power operational methods for thermal-energy-harvesting sensor circuits. Here, the amount of harvested current has been measured as low as 8uA. However the DC power consumption of the sensor circuit is known to consume much larger than 8uA. Thus, We propose the hardware-based power gating and software-based active/sleep timing control schemes, respectively, for controlling the power consumption of sensor circuit. In the hardware-based power gating scheme, if the ratio of Toff/Ton is larger than 22, the sensor can consume less than 8uA. For the software-based active/sleep control scheme, if the ratio of Tslp/Tact is larger than 3, we can suppress the current consumption below 8uA. The hardware-based and software-based schemes proposed in this paper would be helpful in various applications of energy-harvesting sensor circuits, where the power consumption is limited by an amount of harvested energy.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.13 no.3
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• pp.25-33
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• 1999

In this paper, the method of reducing hanmnics and correcting of power factor in single PWM converter associated with diode rectifier and boost converter is studied. In the general diode rectifier there are sorre problems that discontinuous current of reducing power factor and including distortion of hanmnics at the input current affects other sources. To solve the problems of performance degradation due to pulse wavefonn in the input current, the ac-dc converter in which the hanmnic distortion in the input current is reduced using a third-hanmnic-injected PWM is proposed. A lower power loss of switching and easy configuration of circuit are obtained by adopting discontinuous current mode. Simulation and experimental results of ac-dc converter with 5[kHz] switching frequency are presented and correction of power factor and reduction of total hanmnic distortion was established.lished.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.3
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• pp.71-76
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• 2017

The electrical behavior and flexibility of the screen printed Ag circuits were investigated with infrared radiation sintering times and sintering temperatures. Electrical resistivity and radio frequency characteristics were evaluated by using the 4 point probe measurement and the network analyzer by using cascade's probe system, respectively. Electrical resistivity and radio frequency characteristics means that the direct current resistance and signal transmission properties of the printed Ag circuit. Flexibility of the screen printed Ag circuit was evaluated by measuring of electrical behavior during IPC sliding test. Failure mode of the Ag printed circuits was observed by using field emission scanning electron microscope and optical microscope. Electrical resistivity of the Ag circuits screen printed on Pl substrate was rapidly decreased with increasing sintering temperature and durations. The lowest electrical resistivity of Ag printed circuit was up to $3.8{\mu}{\Omega}{\cdot}cm$ at $250^{\circ}C$ for 45 min. The crack length arisen within the printed Ag circuit after $10{\times}10^4$ sliding numbers was 10 times longer than that of after $2.5{\times}10^4$ sliding numbers. Measured insertion loss and calculated insertion loss were in good agreements each other. Insertion loss of the printed Ag circuit was increased with increasing the number of sliding cycle.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.2070-2078
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• 2014

In this work, the frequency response of gate-all-around (GAA) Ge/GaAs heterojunction tunneling field-effect transistor (TFET) with hetero-gate-dielectric (HGD) and pnpn channel doping profile has been analysed by technology computer-aided design (TCAD) device-circuit mixed-mode simulations, with comparison studies among ppn, pnpn, and HGD pnpn TFET devices. By recursive tracing of voltage transfer curves (VTCs) of a common-source (CS) amplifier based on the HGD pnpn TFET, the operation point (Q-point) was obtained at $V_{DS}=1V$, where the maximum available output swing was acquired without waveform distortion. The slope of VTC of the amplifier was 9.21 V/V (19.4 dB), which mainly resulted from the ponderable direct-current (DC) characteristics of HGD pnpn TFET. Along with the DC performances, frequency response with a small-signal voltage of 10 mV has been closely investigated in terms of voltage gain ($A_v$), unit-gain frequency ($f_{unity}$), and cut-off frequency ($f_T$). The Ge/GaAs HGD pnpn TFET demonstrated $A_v=19.4dB$, $f_{unity}=10THz$, $f_T=0.487$ THz and $f_{max}=18THz$.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.13 no.3
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• pp.184-196
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• 2020

In this paper, a single-bit 2nd-order delta-sigma modulator with the architecture of cascaded-of-integrator feedforward (CIFF) is proposed for precision measurement of current flowing through a secondary cell battery in a battery management system (BMS). The proposed modulator implements two switched capacitor integrators and a single-bit comparator with peripheral circuits such as a non-overlapping clock generator and a bias circuit. The proposed structure is designed to be applied to low-side current sensing method with low common mode input voltage. Using the low-side current measurement method has the advantage of reducing the burden on the circuit design. In addition, the ±30mV input voltage is resolved by the ADC with 15-bit resolution, eliminating the need for an additional programmable gain amplifier (PGA). The proposed a single-bit 2nd-order delta-sigma modulator has been implemented in a 350-nm CMOS process. It achieves 95.46-dB signal-to-noise-and-distortion ratio (SNDR), 96.01-dB spurious-free dynamic range (SFDR), and 15.56-bit effective-number-of-bits (ENOB) with an oversampling ratio (OSR) of 400 for 5-kHz bandwidth. The area and power consumption of the delta-sigma modulator are 670×490 ㎛2 and 414 ㎼, respectively.