• Journal of Power Electronics
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• v.15 no.6
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• pp.1593-1600
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• 2015

This paper proposes a novel compensation algorithm of current offset error for single-phase linear compressor in home appliances. In a half-bridge inverter, current offset error may cause unbalanced DC-link voltage when the DC-link is comprised of two serially connected capacitors. To compensate the current measurement error, the synchronous reference frame transformation is used for detecting the measurement error. When an offset error occurs in the output current of the half-bridge inverter, the d-axis current has a ripple with frequency equal to the fundamental frequency. With the use of a proportional-resonant controller, the ripple component can be removed, and offset error can be compensated. The proposed compensation method can easily be implemented without much computation and additional hardware circuit. The validity of the proposed algorithm is verified through experimental results.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.41-44
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• 1999

The main purpose of the UPS is to supply independent and stable power to connected equipment. In installing and operating the UPS system, songle module, three phase UPS in more benefit than multi module, songle phase UPS in the point of volume and cost. However, when supplying Rectifier with output power form three phase UPS, by connecting auto-transformer, occurred harmonic and ripple current makes output filter damaged and leads to nonlinear current coasted by unbalance load. Therefor, in this paper the aim of concentring compound-wound transformer and harmonic filter is supplying liner current by reducing harmonic and ripple current and improving unbalance in voltage and distortion in current wave.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.300-302
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• 1995

This paper describes a current control method for a single-phase PWM inverter. The proposed PWM inverter utilizes the instantaneous control method which is based on the real-time digital feedback control and the microprocessor-based deadbeat control. For the deadbeat current controller, the system's order becomes a high order and increases computation delay time. Therefore, The delay time produces current ripple. To minimize the current ripple, a new method based on deadbeat control theory for current regulation is proposed. It is constructed by a reduced-order state observer which predicts the output current in next sampling instant.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.5
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• pp.1187-1195
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• 2013

Photovoltaic inverters should always track the maximum power of solar cell arrays in operation. Also, they should be irrespective of the maximum power point voltage of a wide range of solar cells in tracking the maximum power point. If the current ripple of solar cells occurs, the function of maximum power point tracking drops, and normal tracking is difficult when solar radiation or the maximum power point changes. To solve this problem, this paper proposed a new maximum power point tracking algorithm with high efficiency and an algorithm to reduce the current ripple of solar cells. According to the results from the test on 4KW grid-connected PV inverter, the efficiency of maximum power point tracking and inverter output and the total harmonic distortion of inverter output current showed 99.97%, 97.5% and 1.05% respectively. So, the inverter showed excellent performance, and made possible stable maximum power point tracking operation when the solar radiation rapidly changed from 100% to 10% and from 10% to 100% for 0.5 seconds.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.1
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• pp.91-97
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• 2014

Recently, the LED(Light Emitting Diode) is expected to replace conventional lamps including incandescent, halogen and fluorescent lamps for some general illumination application, due to some obvious features such as high luminous efficiency, safety, long life, environment-friendly characteristics and so on. To drive the LED, a single stage PFC(Power Factor Correction) flyback converter has been adopted to satisfy the isolation, PFC and low cost. The conventional flyback LED driver has the serious disadvantage of high 120Hz output current ripple caused by the PFC operation. To overcome this drawback, a new PFC flyback with low 120Hz output current ripple is proposed in this paper. It is composed of 2 power stages, the DCM(Discontinuous Conduction Mode) flyback converter for PFC and BCM(Boundary Conduction Mode) boost converter for tightly regulated LED current. Since the link capacitor is located in the secondary side, its voltage stress is small. Moreover, since the driver is composed of 2 power stages, small output filter and link capacitor can be used. Especially, since the flyback is operated at DCM, the PFC can be automatically obtained and thus, an additional PFC IC is not necessary. Therefore, only one control IC for BCM boost converter is required. To confirm the validity of the proposed converter, theoretical analysis and experimental results from a prototype of 24W LED driver are presented.

• Proceedings of the KIPE Conference
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• 1996.06a
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• pp.26-30
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• 1996

This paper proposes a novel method to reduce the torque ripple due to the non-ideality of the current sensing parts in vector-controlled inverter-fed PMSM(Permanent Magnet Synchronous Motor) drive systems. The motor output torque equations are derived in terms of their offset voltages and different voltage transducing gains. And the effects of phase current errors on motor torque are analyzed for both salient PMSM and non-salient PMSM. The proposed method can eliminate the torque ripple by nulling the offset voltages and setting the voltage transducing gains to the same value. To verify the proposed method, digital simulations are carried out for non-salient PMSM.

• Proceedings of the KSR Conference
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• 2005.05a
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• pp.800-805
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• 2005

In this study, control schemes are proposed for a propulsion system of TTX(Tilting Train eXpress). In developed traction converter, unity power factor control, compensation method of dc link voltage have been applied. Output current of converter contains harmonic ripple at twice input ac line frequency, which causes a ripple in the dc link voltage so that beatless control is developed in inverter system to reduce the pulsating torque current. This system is verified by the system modelling and prototype test.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.1
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• pp.110-116
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• 2013

This paper proposes a current ripple reduction method to improve the control performance of B4 type inverter that is studied for cost-effective drive systems. B4 inverters employ only four switches and they have a center-tapped connection between the split dc-link capacitors and one phase of a three-phase motor or load. In the B4 topology, unbalanced three-phase voltages will be generated due to the dc-link voltage ripple. To solve this problem, this paper presents a voltage distortion compensation method that adjusts the voltage reference with the consideration of dc-link voltage ripple. The validity of the proposed method is verified by simulation and excremental results with an induction machine.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.127-129
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• 1988

Square-wave current source inverter drives suffer from torque pulsation and speed variation at low speed. Attempts to minimize these problems, CSI PWM strategies have been reported. It is shown that these PWM strategies are based on unnecessarily restrictive modulation laws. In this paper, trapezoidal PWM strategy for CSI is investigated theoratically by double fourier series and we proposed Harmonic Speed ripple Factor(HSF) that is independent of motor parameters and load conditions. Speed ripple are considered in T-PWM and square wave inverter by HSF. We obtain modulation index(M) and carrier ratio (CR) for minimum speed ripple.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.355-356
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• 2015

This paper proposes a control strategy of total output power ripple cancellation for both of Machine-Side Converter (MSC) and Grid-Side Converter (GSC) in a DFIG under unbalanced grid conditions. The proposed control strategy for the MSC is the zero torque ripple control algorithm with an enhanced LVRT capability. The control algorithm for the MSC exhibits reduced torque pulsation in steady-state unbalanced grid conditions. In addition, this control algorithm also minimizes a peak value of rotor current in transient unbalanced grid conditions. The total output power ripple cancellation control algorithm is adopted in the GSC. The total output power ripple cancellation is achieved by nullifying the oscillating component of the total output active and reactive power at the summing point of stator and rotor of DFIG. The proposed control strategy for the GSC reduces the output power oscillation leading to the improved quality of wind farms output.