• Proceedings of the KIPE Conference
• /
• 2013.07a
• /
• pp.319-320
• /
• 2013

본 논문에서는 PSR(Primary Side Regulator)에 적용 가능한 새로운 방식의 부하 전류 예측 알고리즘을 제안한다. 기존의 부하 전류 예측 방식은 DCM(Discontinuous Conduction Mode) 및 BCM(Boundary Conduction Mode) 동작만이 가능하다. 하지만 제안된 방식은 Power Balance Rule을 적용한 간단한 알고리즘을 통해 CCM(Continuous Conduction Mode) 동작에서도 정확한 부하 전류 예측이 가능하다. 따라서 높은 출력을 요구하는 어플리케이션에서 고효율 달성에 유리하고, CC(Constant Current) 제어가 우수하다. 제안 알고리즘의 우수성과 신뢰성 검증을 위하여 12W급 플라이백 컨버터의 시작품을 제작하였고, 이를 이용한 실험 결과를 바탕으로 타당성을 확인한다.

• ETRI Journal
• /
• v.32 no.4
• /
• pp.520-529
• /
• 2010

In this paper, we present a low-voltage low-dropout voltage regulator (LDO) for a system-on-chip (SoC) application which, exploiting the multiplication of the Miller effect through the use of a current amplifier, is frequency compensated up to 1-nF capacitive load. The topology and the strategy adopted to design the LDO and the related compensation frequency network are described in detail. The LDO works with a supply voltage as low as 1.2 V and provides a maximum load current of 50 mA with a drop-out voltage of 200 mV: the total integrated compensation capacitance is about 40 pF. Measurement results as well as comparison with other SoC LDOs demonstrate the advantage of the proposed topology.

• Journal of Institute of Control, Robotics and Systems
• /
• v.3 no.6
• /
• pp.576-581
• /
• 1997

DC-DC converter with chopper is seen to have problems, such as, loop instability and degradation of transient response, due to the interaction between input filter and switching regulator. In this paper, the switching regulator consisting of input filter and double chopper is analyzed, and the state space model at continuous current mode and the transfer function between duty ratio of switching pulse and output voltage are derived. The controller in this paper is designed as feedforward(P) and feedback(PI) control scheme to minimize the variation of output voltage, and computer simulation results are presented to show the performance of the proposed controller.

• Proceedings of the KIPE Conference
• /
• 2007.07a
• /
• pp.415-417
• /
• 2007

In this paper, The authors study the boost Regulator as a DC-DC Converter like a power supply and describe the investigation result about the two phase with combined boost regulator which has the same effect that the switching frequency of the solid-state-switch is two times. As a result, the ripple of the input current and output current is better improved.

• Proceedings of the KIEE Conference
• /
• 2001.07d
• /
• pp.2531-2533
• /
• 2001

This paper describes a low noise and high efficiency analog-digital switching mixed mode battery charger for production facilities of Li-Ion batteries. The requirements for battery chargers for production facilities are very strict. The accuracy of output voltage and output current should be below 0.1% with very low ripple current. Therefore analog type linear regulators are widely used for battery charger in spite of their inefficiency and bulkiness. We combined linear regulator as a voltage source with digital switching converter as a dependent current source. Low current ripple and high accuracy are obtained by linear regulator while high efficiency is achieved by digital switching converter. Experimental results show that proposed method has 0.1% ripple and 90% efficiency at an output current of 1A for a battery voltage of 4V.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.2
• /
• pp.186-192
• /
• 2012

Half-rail stacked drivers are used to reduce power consumption of the drivers for synchronous buck converters. In this paper, the stacked driver is optimized by matching the average charging and discharging currents used by high-side and low-side drivers. By matching the two currents, the average intermediate bias voltage can remain constant without the aid of the voltage regulator as long as the voltage ripple stays within the window defined by the hysteresis of the regulator. Thus the optimized driver in this paper can minimize the power consumption in the regulator. The current matching requirement yields the value for the intermediate bias voltage, which deviates from the half-rail voltage. Furthermore the required capacitance is also reduced in this design due to decreased charging current, which results in significantly reduced die area. The detailed analysis and design of the stacked driver is verified through simulations done using 5V MOSFET parameters of a typical 0.35-${\mu}m$ CMOS process. The difference in power loss between the conventional half-rail driver and the proposed driver is less than 1%. But the conventional half-rail driver has excess charge stored in the capacitor, which will be dissipated in the regulator unless reused by an external circuit. Due to the reduction in the required capacitance, the estimated saving in chip area is approximately 18.5% compared to the half-rail driver.

• ETRI Journal
• /
• v.39 no.3
• /
• pp.373-382
• /
• 2017

A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of $433.80{\mu}V/mA$ and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of $1{\mu}s$. The total current consumption is $17.88{\mu}V/mA$ (for a 0.9 V supply voltage).

• Journal of IKEEE
• /
• v.19 no.2
• /
• pp.260-264
• /
• 2015

In this paper, we propose mode selector for operating a switching system and regulator of linear system to detect the load current. The proposed mode selector can be a mode switching of linear system and switching system, and it has been proposed to compensate for the disadvantages of regulator of switching system with low efficiency in light load conditions. At light load conditions, the mode selector is possible to provide a high efficiency in light load condition by switching the mode to the regulator of linear system. The mode selector was designed to using a Dongbu Hitek $0.18{\mu}m$ CMOS process.

• Aerospace Engineering and Technology
• /
• v.3 no.2
• /
• pp.11-19
• /
• 2004

A software-controlled unregulated bus system in which the main bus is directly connected to a battery and the duty-ratio for PWM switch is controlled by the on-board satellite software, is usually used for LEO satellites. This paper proposes a new power-stage circuit that can be available for modularization of a power regulator which is used at the software-controlled unregulated bus system satellite. And we analyze the proposed power-stage operation according to its operating modes and verify it by performing software simulation and hardware experiment using prototype. We construct a parallel-module converter which is composed of the proposed power-stage and perform experiment to verify modular characteristics of the proposed power-stage. Finally, we verify the usefulness of the proposed power-stage by comparing above results with those of a parallel-module converter made of conventional power-stage.

• Journal of Korea Society of Industrial Information Systems
• /
• v.8 no.2
• /
• pp.84-91
• /
• 2003

KOMPSAT series use software-controlled unregulated bus system in which the main bus is directly connected to a battery and the duty-ratio for PWM switch is controlled by the on-board satellite software. This paper proposes a new power-stage circuit that can be available for modularization of the power regulator which is used at the software-controlled unregulated bus system satellite. And we analyze the proposed power-stage operation according to its operating modes and verify it by performing software simulation and hardware experiment using prototype. We construct a parallel-module converter which is composed of proposed power-stages and perform experiment to verify modular characteristics of the proposed power-stage. Finally, we verify the usefulness of the proposed power-stage by comparing above results with those of a parallel-module converter made of conventional power-stages.