• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.2174_2175
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• 2009

This Paper present about loop impedance characteristic based on korea internal electrical environment. Analysis parameters were touch voltage, electrical shock current and human body resistance. Result, For protect of electrical shock must measuring of loop impedance. And current capacity & loop impedance are must important parameters.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.184-188
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• 2001

In this paper, a new fully digital control method for single-phase UPS inverter, which is based on the double control loop such as the outer voltage control loop and inner current control loop, is proposed. The inner current control loop is designed and implemented in the form of internal model control and takes the presence of computational time-delay into account. Therefore, this method provides an overshoot-free reference-to-output response. In the proposed scheme, the outer voltage control loop employing P controller with resonance model implemented by a DSP is introduced. The proposed resonance model has an infinite gain at resonant frequency, and it exhibits a function similar to an integrator for AC component. Thus the outer voltage control loop causes no steady state error as regard to both magnitude and phase. The effectiveness of the proposed control system has been demonstrated by the simulation and experimental results respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.698-701
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• 2016

A phase-locked loop(PLL) with effectively increased capacitance by current modulator has been proposed. In this paper, the effective capacitance of loop filter is increased by using current modulator and it results in 1/10 reduction of capacitance in loop filter. It has been designed with a 1.8V $0.18{\mu}m$ CMOS process. The simulation results show that the proposed PLL has the same phase noise characteristic and locking time of conventional PLL.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.6
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• pp.1537-1544
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• 2012

In this paper, a new integration of linear mapping capability with 4-20mA current loop receiver. This module allow user to change instrument variable instantly. Configurations are easy to set by using console command through serial communication port. Break in current loop or faulty current transmitter are easily detect through indicator. The implementation of the module and the test results are discussed.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.5
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• pp.71-78
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• 2012

This paper presents a digital control solution to process capacitor current feedback of high performance single-phase UPS for non-linear loads. In all UPS the goal is to maintain the desired output voltage waveform and RMS value over all unknown load conditions and transient response. The proposed UPS uses instantaneous load voltage and filter capacitor current feedback, which is based on the double regulation loop such as the outer voltage control loop and inner current control loop. The proposed DSP-based digital-controlled PWM inverter system has fast dynamic response and low total harmonic distortion (THD) for nonlinear load. The control system was implemented on a 32bit Floating-point DSP controller TMS320C32 and tested on a 5[KVA] IGBT based inverter switching at 11[Khz]. The validity of the proposed scheme is investigated through simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.12 no.6
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• pp.2208-2218
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• 2017

To resolve overload in a distribution system, a distribution system operator (DSO) often performs a load transfer using normally open tie points and switches in the distribution line. During this process, the distribution system is momentarily operated in closed-loop operation. A closed-loop current in the distribution system can cause a power failure due to excess breaking current in the circuit breakers and reclosers. Therefore, it is necessary to calculate the closed-loop current exactly. However, if there are a large number of distributed generation (DG) systems in the distribution system, such as energy storage systems (ESS), they might obstruct the closed-loop operation based on bidirectional power flow. For quick and precise operation of a closed-loop system, the ESS has to regulate the power generation while satisfying closed-loop operation in the worst cases. We propose a strategy for balanced power regulation of an ESS. Simulations were carried out using PSCAD/EMTDC, and the results were compared with calculation results.

• Journal of Power Electronics
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• v.19 no.4
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• pp.869-880
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• 2019

Due to the inherent feedforward of load current, capacitor current (CC) control shows a fast transient response that makes it suitable for the power supplies used in various portable electronic devices. However, considering the effect of the outer voltage loop, the stable range of the duty-cycle is significantly diminished in CC controlled buck converters. To investigate the stability effect of the outer voltage loop on buck converters, a CC controlled buck converter with a proportion-integral (PI) compensator is taken as an example, and its second-order discrete-time model is established. Based on this model, the instability caused by the duty-cycle is discussed with consideration of the outer voltage loop. Then the dynamical effects of the feedback gain of the PI compensator and the equivalent series resistance (ESR) of the output capacitor on the CC controlled buck converter with a PI compensator are studied. Furthermore, the design-oriented closed-loop stability criterion is derived. Finally, PSIM simulations and experimental results are supplied to verify the theoretical analyses.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1286-1294
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• 2015

Capacitor current feedback active damping is extensively used in grid-connected converters with an LCL filter. However, systems tends to become unstable when the digital control delay is taken into account, especially in low switching frequencies. This paper discusses this issue by deriving a discrete model with a digital control delay and by presenting the stable region of an active damping loop from high to low switching frequencies. In order to overcome the disadvantage of capacitor current feedback active damping, this paper proposes a modified approach using grid current and converter current for feedback. This can expand the stable region and provide sufficient active damping whether in high or low switching frequencies. By applying the modified approach, the active damping loop can be simplified from fourth-order into second-order, and the design of the grid current loop can be simplified. The modified approach can work well when the grid impedance varies. Both the active damping performance and the dynamic performance of the current loop are verified by simulations and experimental results.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.1789-1794
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• 2014

This paper suggests an application method for a superconducting fault current limiter (SFCL) using an evaluation index to estimate the risk regarding the short-circuit capacity of the circuit breaker (CB). Recently, power distribution systems have become more complex to ensure that supply continuously keeps pace with the growth of demand. However, the mesh or loop network power systems suffer from a problem in which the fault current exceeds the short-circuit capacity of the CBs when a fault occurs. Most case studies on the application of the SFCL have focused on its development and performance in limiting fault current. In this study, an analysis of the application method of an SFCL considering the risk of the CB's short-circuit capacitor was carried out in situations when a fault occurs in a loop network power system, where each line connected with the fault point carries a different current that is above or below the short-circuit capacitor of the CB. A loop network power system using PSCAD/EMTDC was modeled to investigate the risk ratio of the CB and the effect of the SFCL on the reduction of fault current through various case studies. Through the risk evaluations of the simulation results, the estimation of the risk ratio is adequate to apply the SFCL and demonstrate the fault current limiting effect.

• Proceedings of the KIPE Conference
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• 2003.07a
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• pp.337-340
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• 2003

This paper presented practical details about control-loop design and dynamic analysis for a peak current-mode controlled asymmetrical half-bridge(ASHB) do-to-dc converter, Graphical loop gain method is used to design the feedback compensation and analyze the closed-loop performance of ASHB converter. The results of the control design and closed-loop analysis are validated by experiments on a prototype converter.