• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.4
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• pp.269-274
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• 2004

Current delivery system, in which the analog current produced by a unique DAC circuit is stored into a current-memory circuit and delivered in a time-divided sequence, shows variation of output current as low as 4% in a current source data-driver IC for AM-OLED driven by a current-programmed method without any fuse repairing after fabrication. This driver IC has 54 outputs and can sink constant current as low as 3 ${\mu}A$ with 6-bit analog levels. Such a low current level without variation can hardly be obtained by an ordinary MOS transistor because the current level is in the sub-threshold region and changes exponentially with threshold voltage variation. Thus we adopted a current mirror circuit composed of bipolar transistors to supply well-controlled current within a nano-ampere range.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1298-1305
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• 2016

This paper presents the development of a short-circuit protection mechanism on a high voltage switch (HVS) board which is built by a series connection of semiconductor switches. The HVS board is able to quickly detect and limit the peak fault current before the signal board triggers off a gate signal. Voltage clamping techniques are used to safely turn off the short-circuit current and to prevent overvoltage of the series-connected switches. The selection method of the main devices and the development of the HVS board are described in detail. Experimental results have demonstrated that the HVS board is capable of withstanding a short-circuit current at a rated voltage of 10kV without a di/dt slowing down inductor. The corresponding short-circuit current is restricted to 125 A within 100 ns and can safely turn off within 120 ns.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.6
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• pp.927-935
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• 1994

Detailed analysis of the commutation circuit of the proposed wide-frequency current source inverter is given. In this inverter a spike-limit circuit and a precommutation circuit are used. The spike-limit circuit is intended to limit spike voltage which is arising during commutation time in a current source inverter, and the precommutation circuit to reuse the energy which flows from main inverter to spike-limit circuit during commutation time to aid commutation. Thus voltage stress of main thyristor is minimized. Since this inverter can be made up of thyristors for phase control, it has some advantage in high voltage and high power application.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.14-14
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• 2010

A high voltage current sensing circuit for LED driver IC is designed and verfied by Cadence SPECTRE simulations. The current mirror pair, power and sensing MOSFETs with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side LDMOST switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35um BCD process show that current sensing is accurate with properly frequency compensated opamp.

• 전기의세계
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• v.22 no.2
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• pp.70-74
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• 1973

This paper dealt with circuit modeling of SCR and gate turn-off SCR by using complementary symmetrical tansistor circuit, which is modified circuit of input current dependent, current stable negative resitance circuit. Operation of this circuit is estimated and analyzed, with which compared with conventional SCR modeling circuit. Also operation and the design procedures are checked by experiments.

• Journal of Electrical Engineering and Technology
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• v.7 no.5
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• pp.778-783
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• 2012

The synthetic short-circuit making test to adequately stress the circuit breaker has been specified as the mandatory test duty in the IEC 62271-100. The purpose of this test is to give the maximum pre-arcing energy during making operation. And this requires the making operation with symmetrical short-circuit current that is established when the breakdown between contact gap occurs near the crest of the applied voltage. Also, if the interrupting chamber of circuit breakers is designed as the type of common enclosure or the operation is made by the gang operated mechanism that three-phase contacts are operated by one common mechanism, three-phase synthetic making test is basically required. Therefore, several testing laboratories have developed and proposed their own test circuits to properly evaluate the breaker performance. With these technical backgrounds, we have developed the new alternative three-phase making circuit.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1192-1195
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• 2005

This paper presents the realization of a multiple-input maximum circuit, which is operated in a current-mode. The proposed circuit operates with bi-directional input current signal and employs 5n+4 transistors for n inputs. The realization method is suitable for fabrication using CMOS technology. The proposed circuit is useful building block for the real-time systems. The performances of the proposed bi-directional maximum circuit were studied using the PSPICE analog simulation program. The simulation results verified the circuit performances are agreed with the expected values.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.7-13
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• 2008

This paper proposes a newly structured circuit that can compensate current deviation of a data driver circuit for OLED. A conventional data drivel circuit for OLED cannot compensate the current deviation at the data drivel circuit output terminal generated by MOS process change, but the proposed data drivel circuit can authorize uniform value of current to an OLED panel by calibrating the current deviation at the output terminal. The proposed circuit can minimize current deviation of the output current via process change by connecting the circuit for data output current with a common interconnect line through addition of a switching transistor to the existing data output circuit. The circuit proposed in this paper has been designed based on an OLED panel supporting $128{\times}128$ resolution, and the process used for driver circuit development is 0.35um. As a result of the experiment in this study, the output current of the data driver circuit proposed here has 1% range of error, while 9% range of severe changes was demonstrated in the case of the previous data driver circuit. When using the data driver circuit for OLED proposed in this paper, high definition OLED display can be actualized and the circuit can be applied to mobile display devices requiring high quality display features.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.5
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• pp.299-304
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• 2018

An ideal circuit breaker should supply electric power to loads without losses in a conduction state and completely isolate the load from the power source by providing insulation strength in a break state. Fault current is relatively easy to break in an Alternating Current (AC) circuit breaker because the AC current becomes zero at every half cycle. However, fault current in DC circuit breaker (DCCB) should be reduced by generating a high arc voltage at the breaker contact point. Large fire may occur if the DCCB does not take sufficient arc voltage and allows the continuous flow of the arc fault current with high temperature. A semiconductor circuit breaker with a power electronic device has many advantages. These advantages include quick breaking time, lack of arc generation, and lower noise than mechanical circuit breakers. However, a large load capacity cannot be applied because of large conduction loss. An extinguishing technology of DCCB with polymeric positive temperature coefficient (PPTC) device is proposed and evaluated through experiments in this study to take advantage of low conduction loss of mechanical circuit breaker and arcless breaking characteristic of semiconductor devices.

• The KIPS Transactions:PartA
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• v.17A no.3
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• pp.121-126
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• 2010

This paper proposes a low-power MOS current-mode logic circuit with the low voltage swing technology and the high-threshold sleep-transistor. The sleep-transistor is used to high-threshold voltage PMOS transistor to minimize the leakage current. The $16{\times}16$ bit parallel multiplier is designed by the proposed circuit structure. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/104. The proposed circuit is achieved to reduce the power consumption by 11.7% and the power-delay-product by 15.1% compared with the conventional MOS current-model logic circuit in the normal mode. This circuit is designed with Samsung $0.18\;{\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation.