• Title/Summary/Keyword: Current and voltage control

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A Quality Assurance on Digital Chest Radiography in Medical Institution for Pneumoconiosis : Compared with Analog Radiography (진폐요양기관의 흉부 디지털촬영과 아날로그촬영의 정도관리 비교)

  • Lee, Won-Jeong;Ko, Kyung-Sun;Park, Jai-Soung;Kim, Sung-Jin;Chu, Sang-Deok;Park, So-Young;Choi, Byung-Soon
    • Journal of radiological science and technology
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    • v.33 no.2
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    • pp.85-91
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    • 2010
  • Digital radiography has been replacing rapidly the analog radiography for diagnosis of pneumoconiosis. The purpose of this study is to compare quality control of digital radiography (DR) and analog radiography (AR) for chest radiography in medical institution for pneumoconiosis (MIP) For the first time, we visited MIP to evaluate the chest radiography which is used for patients with pneumoconiosis, including equipment, technical parameters and reading environment. There were 33 institutions. DR and AR were installed in 24 and 9 institutions, respectively. Between DR and AR, we compared the radiological technique (RT), image quality (IQ) and reading environment (RE) to use the guideline published by Occupational Safety and Health Research Institute (OSHRI). The image quality was rated by two experienced chest radiologists for pneumoconiosis with certified from OSHRI. The chest radiography equipment was not significantly difference between AR and DR, but there were significantly difference in tube voltage and grid ratio used for chest radiography except to tube current, exposure time. Statistically, DR is significantly higher in RT(70.3 vs. 43.8, p = 0.009), RE(77.7 vs. 33.3, p = 0.004) than AR, but it's not significantly difference in IQ (65.6 vs. 52.8, p = 0.050). AR and DR in RT were passed 33.3%, 75.0% respectively (p = 0.044) and 44.4%, 79.2% (p = 0.090) in IQ and 44.4%, 91.7% (p = 0.009) in RE. In MIP, DR needs to replace AR in diagnosis of pneumoconiosis.

Battery Level Calculation and Failure Prediction Algorithm for ESS Optimization and Stable Operation (ESS 최적화 및 안정적인 운영을 위한 배터리 잔량 산출 및 고장 예측 알고리즘)

  • Joo, Jong-Yul;Lee, Young-Jae;Park, Kyoung-Wook;Oh, Jae-Chul
    • The Journal of the Korea institute of electronic communication sciences
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    • v.15 no.1
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    • pp.71-78
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    • 2020
  • In the case of power generation using renewable energy, power production may not be smooth due to the influence of the weather. The energy storage system (ESS) is used to increase the efficiency of solar and wind power generation. ESS has been continuously fired due to a lack of battery protection systems, operation management, and control system, or careless installation, leading to very big casualties and economic losses. ESS stability and battery protection system operation management technology is indispensable. In this paper, we present a battery level calculation algorithm and a failure prediction algorithm for ESS optimization and stable operation. The proposed algorithm calculates the correct battery level by accumulating the current amount in real-time when the battery is charged and discharged, and calculates the battery failure by using the voltage imbalance between battery cells. The proposed algorithms can predict the exact battery level and failure required to operate the ESS optimally. Therefore, accurate status information on ESS battery can be measured and reliably monitored to prevent large accidents.

Botulinum toxin type A enhances the inhibitory spontaneous postsynaptic currents on the substantia gelatinosa neurons of the subnucleus caudalis in immature mice

  • Jang, Seon-Hui;Park, Soo-Joung;Lee, Chang-Jin;Ahn, Dong-Kuk;Han, Seong-Kyu
    • The Korean Journal of Physiology and Pharmacology
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    • v.22 no.5
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    • pp.539-546
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    • 2018
  • Botulinum toxin type A (BoNT/A) has been used therapeutically for various conditions including dystonia, cerebral palsy, wrinkle, hyperhidrosis and pain control. The substantia gelatinosa (SG) neurons of the trigeminal subnucleus caudalis (Vc) receive orofacial nociceptive information from primary afferents and transmit the information to higher brain center. Although many studies have shown the analgesic effects of BoNT/A, the effects of BoNT/A at the central nervous system and the action mechanism are not well understood. Therefore, the effects of BoNT/A on the spontaneous postsynaptic currents (sPSCs) in the SG neurons were investigated. In whole cell voltage clamp mode, the frequency of sPSCs was increased in 18 (37.5%) neurons, decreased in 5 (10.4%) neurons and not affected in 25 (52.1%) of 48 neurons tested by BoNT/A (3 nM). Similar proportions of frequency variation of sPSCs were observed in 1 and 10 nM BoNT/A and no significant differences were observed in the relative mean frequencies of sPSCs among 1-10 nM BoNT/A. BoNT/A-induced frequency increase of sPSCs was not affected by pretreated tetrodotoxin ($0.5{\mu}M$). In addition, the frequency of sIPSCs in the presence of CNQX ($10{\mu}M$) and AP5 ($20{\mu}M$) was increased in 10 (53%) neurons, decreased in 1 (5%) neuron and not affected in 8 (42%) of 19 neurons tested by BoNT/A (3 nM). These results demonstrate that BoNT/A increases the frequency of sIPSCs on SG neurons of the Vc at least partly and can provide an evidence for rapid action of BoNT/A at the central nervous system.

Analysis of Temperature Characteristics on Accelerometer using SOI Structure (SOI 구조 가속도센서의 온도 특성 해석)

  • Son, Mi-Jung;Seo, Hee-Don
    • Journal of Sensor Science and Technology
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    • v.9 no.1
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    • pp.1-8
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    • 2000
  • One of today's very critical and sensitive accurate accelerometer which can be used higher temperature than $200^{\circ}C$ and corrosive environment, is particularly demanded for automotive engine. Because silicon is a material of large temperature dependent coefficient, and the piezoresistors are isolated with p-n junctions, and its leakage current increase with temperature, the performance of the silicon accelerometer degrades especially after $150^{\circ}C$. In this paper, The temperature characteristic of a accelerometer using silicon on insulator (SOI) structure is studied theoretically, and compared with experimental results. The temperature coefficients of sensitivity and offset voltage (TCS and TCO) are related to some factors such as thermal residual stress, and are expressed numerically. Thermal stress analysis of the accelerometer has also been carried out with the finite-element method(FEM) simulation program ANSYS. TCS of this accelerometer can be reduced to control the impurity concentration of piezoresistors, and TCO is related to factors such as process variation and thermal residual stress on the piezoresistors. In real packaging, The avarage thermal residual stress in the center support structure was estimated at around $3.7{\times}10^4Nm^{-2}^{\circ}C^{-1}$ at sensing resistor. The simulated ${\gamma}_{pT}$ of the center support structure was smaller than one-tenth as compared with that of the surrounding support structure.

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Fractional-N PLL Frequency Synthesizer Design (Fractional-N PLL (Phase-Locked Loop) 주파수 합성기 설계)

  • Kim Sun-Cheo;Won Hee-Seok;Kim Young-Sik
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.7 s.337
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    • pp.35-40
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    • 2005
  • This paper proposes a fractional-N phase-locked loop (PLL) frequency synthesizer using the 3rd order ${\Delta}{\sum}$ modulator for 900MHz medium speed wireless link. The LC voltage-controlled oscillator (VCO) is used for the good phase noise property. To reduce the lock-in time, a charge pump has been developed to control the pumping current according to the frequency steps and the reference frequency is increased up to 3MHz. A 36/37 fractional-N divider is used to increase the reference frequency of the phase frequency detector (PFD) and to reduce the minimum frequency step simultaneously. A 3rd order ${\Delta}{\sum}$ modulator has been developed to reduce the fractional spur VCO, Divider by 8 Prescaler, PFD and Charge pump have been developed with 0.25um CMOS, and the fractional-N divider and the third order ${\Delta}{\sum}$ modulator have been designed with the VHDL code, and they are implemented through the FPGA board of the Xilinx Spartan2E. The measured results show that the output power of the PLL is about -lldBm and the phase noise is -77.75dBc/Hz at 100kHz offset frequency. The minimum frequency step and the maximum lock-in time are 10kHz and around 800us for the maximum frequency change of 10MHz, respectively.

Circuit Modeling and Simulation of Active Controlled Field Emitter Array for Display Application (디스플레이 응용을 위한 능동 제어형 전계 에미터 어레이의 회로 모델링 및 시뮬레이션)

  • Lee, Yun-Gyeong;Song, Yun-Ho;Yu, Hyeong-Jun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.2
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    • pp.114-121
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    • 2001
  • A circuit model for active-controlled field emitter array(ACFEA) as an electron source of active-controlled field emission display(ACFED) has been proposed. The ACFEA with hydrogenated amorphous silicon thin-film transistor(a-Si:H TFT) and Spindt-type molibdenum tips (Spindt-Mo FEA) has been fabricated monolithically on the same glass. A-Si:H TFT is used as a control device of field emitters, resulting in stabilizing emission current and lowering driving voltage. The basic model parameters extracted from the electrical characteristics of the fabricated a-Si:H TFT and Spindt-Mo FEA were implemented into the ACFEA model with a circuit simulator SPICE. The accuracy of the equivalent circuit model was verified by comparing the simulated results with the measured one through DC analysis of the ACFEA. The transient analysis of the ACFEA showed that the gate capacitance of FEA along with the drivability of TFT strongly affected the response time. With the fabricated ACFEA, we obtained a response time of 15$mutextrm{s}$, which was enough to make 4bit/color gray scale with the pulse width modulation (PWM).

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Design and Implementation of Biological Signal Measurement Algorithm for Remote Patient Monitoring based on IoT (IoT기반 원격환자모니터링을 위한 생체신호 측정 알고리즘 설계 및 구현)

  • Jung, Ae-Ran;You, Yong-Min;Lee, Sang-Joon
    • Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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    • v.8 no.6
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    • pp.957-966
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    • 2018
  • Recently, the demand for remote patient monitoring based on IoT has been increased due to aging population and an increase in single-person household. A non-contact biological signal measurement system using multiple IR-UWB radars for remote patient monitoring is proposed in this paper. To reduce error signals, a multilayer Subtraction algorithm is applied because when the background subtraction algorithm was applied to the biological signal processing, errors occurred such as voltage noise and staircase phenomenon. Therefore, a multilayer background subtraction algorithm is applied to reduce error occurrence. The multilayer background subtraction algorithm extracts the signal by calculating the amount of change between the previous clutter and the current clutter. In this study, the SVD algorithm is used. We applied the improved multilayer background subtraction algorithm to biological signal measurement and computed the respiration rate through Fast Fourier Transform (FFT). To verify the proposed system using IR-UWB radars and multilayer background subtraction algorithm, the respiration rate was measured. The validity of this study was verified by obtaining a precision of 97.36% as a result of a control experiment with Neulog's attachment type breathing apparatus. The implemented algorithm improves the inconvenience of the existing contact wearable method.

Implementation of Analog Signal Processing ASIC for Vibratory Angular Velocity Detection Sensor (진동형 각속도 검출 센서를 위한 애널로그 신호처리 ASIC의 구현)

  • 김청월;이병렬;이상우;최준혁
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.4
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    • pp.65-73
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    • 2003
  • This paper presents the implementation of an analog signal-processing ASIS to detect an angular velocity signal from a vibrator angular velocity detection sensor. The output of the sensor to be charge appeared as the variation of the capacitance value in the structure of the sensor was detected using charge amplifiers and a self oscillation circuit for driving the sensor was implemented with a sinusoidal self oscillation circuit using the resonance characteristics of the sensor. Specially an automatic gain control circuit was utilized to prevent the deterioration of self-oscillation characteristics due to the external elements such as the characteristic variation of the sensor process and the temperature variation. The angular velocity signal, amplitude-mod)Hated in the operation characteristics of the sensor, was demodulated using a synchronous detection circuit. A switching multiplication circuit was used in the synchronous detection circuit to prevent the magnitude variation of detected signal caused by the amplitude variation of the carrier signal. The ASIC was designed and implemented using 0.5${\mu}{\textrm}{m}$ CMOS process. The chip size was 1.2mm x 1mm. In the experiment under the supply voltage of 3V, the ASIC consumed the supply current of 3.6mA and noise spectrum density from dc to 50Hz was in the range of -95 dBrms/√Hz and -100 dBrms/√Hz when the ASIC, coupled with the sensor, was in normal operation.

A 65-nm CMOS Low-Power Baseband Circuit with 7-Channel Cutoff Frequency and 40-dB Gain Range for LTE-Advanced SAW-Less RF Transmitters (LTE-Advanced SAW-Less 송신기용 7개 채널 차단 주파수 및 40-dB 이득범위를 제공하는 65-nm CMOS 저전력 기저대역회로 설계에 관한 연구)

  • Kim, Sung-Hwan;Kim, Chang-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.3
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    • pp.678-684
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    • 2013
  • This paper describes a low-power baseband circuit for SAW-less LTE-Advanced transmitters. The proposed transmitter baseband circuit consists of a 2nd-order Tow-Thomas type active RC-LPF and a 1st-order passive RC LPF. It can provide a 7 multi-channel cut-off frequencies and wide gain control range of -41 dB ~ 0 dB with a 1-dB step. The proposed 2nd-order active RC-LPF adopts an op-amp in which three other sub-op amps are in parallel connected to reduce DC current for different cutoff frequency. In addition, each sub-op amp adopts both Miller and feed-forward phase compensation method to achieve an UGBW of more than 1-GHz with a small DC power consumption. The proposed baseband circuit is implemented in 65-nm CMOS technology, consuming DC power from 6.3 mW to 24.1 mW from a 1.2V supply voltage for each different cut-off frequency.

A Study on the Implementation of the 2-Dimension Magnetic Fluxgate Sensor (2차원 Magnetic Fluxgate센서의 구현에 관한 연구)

  • Park, Yong-Woo;Kim, Nam-Ho;Ryu, Ji-Goo
    • Journal of Sensor Science and Technology
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    • v.11 no.2
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    • pp.67-76
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    • 2002
  • We have presented a 2-dimensional fluxgate sensor with ferrite core, excitation, and pick-up coil. This fluxgate sensor system consists of a sensing element, driving circuits for excitation coil and signal processing for detecting second harmonic frequency component which is proportional to the DC magnetic to be measured. The sensor core is excited by a square waveform of voltage through the excitation coil of 80 turns. The second harmonic output of pick-up coil(x and y axis: 100 turns) is measured by FFT spectrum analyzer. This result is compared with output of PSD(phase sensitive detector) unit for detecting the second harmonic component. The measured maximum sensitivity is about 1580 V/T at driving frequency of 1.5 kHz and excitation current of 2 App. The nonlinearity of this system is measured about 2.3%(PSD) and about 1%(second harmonics of the pick-up). The angle error of the system is ${\pm}2$ %/FS.