• Journal of Biomedical Engineering Research
• /
• v.18 no.3
• /
• pp.307-313
• /
• 1997

he photoconductive gain mechanism in amorphus silicon devices was investigated in connection with applications to radiation detection. Various device types such as p-i-n, n-i-n and i-i-p-i-n structures were fabricated and tested. Photoconductive gain was measured in two time scales : one for short pulses of visible light(<$1{\mu}sec$) which simulate the transit of energetic charged particles or ${\gamma}$-rays, and the other for rather long pulses of light(1msec) which simulate x-ray exposure in medical imaging, We used two definitions of phtoconductive gain : current gain and charge gain which is an integration of the current gain. We obtained typical charge gains of 3~9 for short pulses and a few hundreds for long pulses at a dark current density level of 10mA/$cm^2$. Various gain results are discussed in terms of the device structure, applied bias and dark current density.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.07a
• /
• pp.840-843
• /
• 2001

In this study, temperature dependency of current gain for AlGaAs/GaAs/GaAs HBT is analytically proposed over the temperature range between 300K and 600K. Energy bandgap, effective mass, intrinsic carrier concentration are considered as temperature dependent parameters. Collector current which is numerically calculated is then analytically expressed to enhance the speed of calculation for current gain. From the results, current gain decreases as the temperature increases. These results will be used to expect the unity current gain frequency f$_{T}$ in conjunction with emitter-base and collector- base capacitances.s.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.57 no.7
• /
• pp.1254-1259
• /
• 2008

A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.163-167
• /
• 2000

This paper presents the digital control of single-phase power factor correction(PFC) converter which has the variable gain according to the condition of inner control loop error. Generally the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This has a bad influence on the power factor because current loop doesn't operate smoothly in the condition that input voltage is low In particular a digital controller has more time delay than an analog controller and degrades This drops the phase margin of the total digital PFC system,. It causes the problem that the gain of current control loop isn't increased enough. In addition the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult The digital PFC controller presented in this paper has a variable gain of current control loop according to input voltage. The 1kW converter was used to verify the efficiency of the digital PFC controller.

• Journal of Korea Society of Industrial Information Systems
• /
• v.19 no.2
• /
• pp.37-43
• /
• 2014

In this paper, we present the effect of forward current gain on emitter area in NPN transistors are used widely in the almost linear integrated circuits and integrated injection logic. Relations between forward current gain and emitter area were conformed with the simulation with examined calculation and experiments. At the same emitter length, as junction depth is increased, common emitter current gain is decreased. Ratio of Emitter bottom area comparing to side area increases, the emitter current gain is increased. The theory and simulation results were fitted in with the experimental data very well.

• Proceedings of the KIEE Conference
• /
• 2001.04a
• /
• pp.240-243
• /
• 2001

This paper presents the digital controller using variable gain for single-phase power factor correction (PFC) converter. Generally, the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This is why input current is distorted under low input voltage. In particular, a digital controller has more time delay than an analog controller which degrades characteristics of control loop. So, it causes the problem that the gain of current control loop isn't increased enough. In addition, the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult. In this paper, the improved digital control method for single-phase power factor converter is presented. The variable gain according to input voltage and input current help to improve current shape. The 800W converter is manufactured to verify the proposed control method.

• Journal of Electrical Engineering and Technology
• /
• v.4 no.3
• /
• pp.401-404
• /
• 2009

A simple analytical expression for a current gain of IGBT is derived in terms of the device parameters as well as a gate length dependent parameter, which allows for the determination of the current components of the device as a function of its gate length. The analytical results are compared with those from simulation results. A good agreement is found.

• Proceedings of the IEEK Conference
• /
• 2008.06a
• /
• pp.457-458
• /
• 2008

This paper presents an output common mode current compensation method to achieve both constant Gm and constant gain. A conventional rail-to-rail CMOS op-amp with constant Gm was designed by using complementary differential input stage and current compensation skills. But it doesn't operate constant gain, because of output resistance variation. With $0.18{\mu}m$ CMOS process, the simulation results show that the differential gain variation can achieve less than 1.3dB. And a 60dB gain, a 13.5MHz unity gain-frequency, and 1mW power consumption, when operating at 1.8V and 10pF load.

• Journal of the Institute of Electronics Engineers of Korea TE
• /
• v.37 no.5
• /
• pp.17-27
• /
• 2000

In a SCH(separate confinement heterostructure) QW(quantum well) laser, we calculated the optical gain, the differential gain and recombination current in the QW and derived the bulk carrier density in the SCH region as a function of the QW current by using the analytical capture escape model. Based upon above relations, we found the optical gain and the differential gain correspond to the ratios of carrier and current injected into the QW.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.18 no.4
• /
• pp.305-311
• /
• 2013

This paper proposes a performance improvement of existing single-phase current-fed qZ-Source inverter. Voltage gain of the traditional voltage-fed full-bridge inverter and single-phase current-fed qZ-source inverter is only equal to or smaller than input voltage. The proposed inverter can obtain twice higher voltage gain than the single-phase current-fed qZ-Source inverter by adding an extra switch and a capacitor in the circuit. In addition, the proposed inverter shares the common ground between dc input and ac output voltage. Therefore, the proposed inverter can eliminate the possible ground leakage current problem when it is used for grid-tied photovoltaic inverter system. A 120 W prototype inverter is built and tested to verify performances of the proposed inverter.