• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.9
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• pp.4788-4813
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• 2019

In this paper, we introduce concepts of optimal and near optimal secret data hiding schemes. We present a new digital image steganography approach based on the Galois field $GF(p^m)$ using graph and automata to design the data hiding scheme of the general form ($k,N,{\lfloor}{\log}_2p^{mn}{\rfloor}$) for binary, gray and palette images with the given assumptions, where k, m, n, N are positive integers and p is prime, show the sufficient conditions for the existence and prove the existence of some optimal and near optimal secret data hiding schemes. These results are derived from the concept of the maximal secret data ratio of embedded bits, the module approach and the fastest optimal parity assignment method proposed by Huy et al. in 2011 and 2013. An application of the schemes to the process of hiding a finite sequence of secret data in an image is also considered. Security analyses and experimental results confirm that our approach can create steganographic schemes which achieve high efficiency in embedding capacity, visual quality, speed as well as security, which are key properties of steganography.

• Journal of information and communication convergence engineering
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• v.15 no.4
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• pp.212-216
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• 2017

In this paper, we introduce novel techniques to improve the high performance of AE functions on modern high-end IoT platforms (ARM-NEON), which support SIMD and cryptography instruction sets. For the Sophie Germain Counter Mode of operation (SGCM), counter modes of encryption and prime field multiplication are required. We chose the Montgomery multiplication for modular multiplication. We perform Montgomery multiplication in a parallel way by exploiting both the ARM and NEON instruction sets. Specifically, the NEON instruction performed 128-bit integer multiplication and the ARM instruction performed Montgomery reduction, simultaneously. This approach hides the latency for ARM in the NEON instruction set. For a high-speed counter mode of encryptions for both AE functions, we introduced two-level computations. When the tasks were large volume, we switched to the NEON instruction to execute the encryption operations. Otherwise, we performed the encryptions on the ARM module.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.337-340
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• 2001

In this Paper, 3 digit-Serial multilier With 3 digit size of 32 is proposed, which has more advantages than the 193bit serial LFSR architecture. We give a design example for the irreducible trinomials $x^{193}$＋ $x^{15＋1}$. In hardware implementations, it is often desirable to use the irreducible trinomial equations. The proposed multiplier is verified with a VHDL description using an elliptic curve addition. The measured results show that the proposed multiplier is 0.3 times smaller than the bit-serial LFSR multiplier..

• Journal of IKEEE
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• v.25 no.1
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• pp.88-94
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• 2021

Public-key cryptographic algorithms such as RSA and ECC, which are currently in use, have used mathematical problems that would take a long time to calculate with current computers for encryption. But those algorithms can be easily broken by the Shor algorithm using the quantum computer. Lattice-based cryptography is proposed as new public-key encryption for the post-quantum era. This cryptographic algorithm is performed in the Polynomial Ring, and polynomial multiplication requires the most processing time. Therefore, a hardware model module is needed to calculate polynomial multiplication faster. Number Theoretic Transform, which called NTT, is the FFT performed in the finite field. The logic verification was performed using HDL, and the proposed design at the transistor level using Hspice was compared and analyzed to see how much improvement in delay time and power consumption was achieved. In the proposed design, the average delay was improved by 30% and the power consumption was reduced by more than 8%.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1485-1490
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• 2013

The demonstration project of the electrical grid for Smart grid is progressed, the smart digital appliances AV technology, Smart home energy management technology charging the management function of complex energy for the automation management of air conditioning and heating, humidity and air, the health care technology charging the design of housing for the elderly and disabled and the measurement of individual bio information, and the Smart home security technology dealing with the biometric security and motion sensors, etc. have been studied. The power monitoring terminal which uses a variety of wired and wireless networks and protocol is the target additionally to be considered in addition to the security vulnerabilities that was occurred in the existing terminal. In this research paper, the author analyzes the cryptographic techniques corresponding to the smart meter occurred by the problems that are exposed on the outside which are vulnerable to physical attacks, and intends to propose the design of the security systems for the Smart meter terminal being able to maximize the efficiency of the terminal.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.233-236
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• 2008

Wire wireless integrated service of BcN(Broadband convergence Network) is expanding. Information Security issue is highlighted for opposing attack of getting information illegally on wire wireless network. The user of PKI(Public Key Infrastructure) cipher system among Information security technology receives various security services about authentication, confidentiality, integrity, non-repudiation and access control etc. A mobile client and server are loaded certificate and wireless internet cryptography module for trusted data send receive. And data sends receives to each other after certification process through validity check of certificate. Certificate and data security system is researched through PKI on wireless network environment and data security system in this paper.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.2
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• pp.738-756
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• 2020

The modular multiplication is the key module of public-key cryptosystems such as RSA (Rivest-Shamir-Adleman) and ECC (Elliptic Curve Cryptography). However, the efficiency of the modular multiplication, especially the modular square, is very low. In order to reduce their operation cycles and power consumption, and improve the efficiency of the public-key cryptosystems, a dual-field efficient FIPS (Finely Integrated Product Scanning) modular multiplication algorithm is proposed. The algorithm makes a full use of the correlation of the data in the case of equal operands so as to avoid some redundant operations. The experimental results show that the operation speed of the modular square is increased by 23.8% compared to the traditional algorithm after the multiplication and addition operations are reduced about (s² - s) / 2, and the read operations are reduced about s² - s, where s = n / 32 for n-bit operands. In addition, since the algorithm supports the length scalable and dual-field modular multiplication, distinct applications focused on performance or cost could be satisfied by adjusting the relevant parameters.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.28 no.1
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• pp.53-60
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• 2018

Cryptographic algorithms are being standardized globally, and the security of cryptographic algorithms has been well proven. However, there is a need for an improved verification method to verify that the existing verification method is correctly implemented according to the standard, because there is a weakness in implementation and it can cause serious damage. Therefore, in this paper, we selected ARIA and LEA to be verified among 128-bit or more block cipher modules performed by the National Intelligence Service, and propose a method to verify whether it is implemented correctly using Cryptol for high-assurance cryptographic module.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.8
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• pp.95-101
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• 2009

Random numbers are used in many sorts of applications. Some applications, like simple software simulation tests, communication protocol verifications, cryptography verification and so forth, need various levels of randomness with various process speeds. In this paper, we propose a fast pseudorandom generator module for embedded systems. The generator module is implemented in hardware which can run in two modes, one of which can generate random numbers with higher randomness but which requires six cycles, the other providing its result within one cycle but with less randomness. An ASIP (Application Specific Instruction set Processor) was designed to implement the proposed pseudorandom generator instruction sets. We designed a processor based on the MIPS architecture,, by using LISA, and have run statistical tests passing the sequence of the Diehard test suite. The HDL models of the processor were generated using CoWare's Processor Designer and synthesized into the Dong-bu 0.18um CMOS cell library using the Synopsys Design Compiler. With the proposed pseudorandom generator module, random number generation performance was 239% faster than software model, but the area increased only 2.0% of the proposed ASIP.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.4
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• pp.242-250
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• 2014

Conventional researches of standard tool validating cryptographic algorithm have been studied for the internet environment, for the mobile internet. It is important to develop the validation tool for establishment of interoperability and convenience of users in the information systems. Therefore, this paper presents the validation tool of Elliptic Curve Cryptography algorithm that can test if following X9.62 technology standard specification. The validation tool can be applied all information securities using DES, SEED, AES, SHA-1/256/384/512, RSA-OAEP V2.0, V2.1, ECDSA, ECKCDSA, ECDH, etc. Moreover, we can enhance the precision of validation through several experiments and perform the validation tool in the online environment.