• Title/Summary/Keyword: Coupled circuits

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Design of Asymmetrical Parallel Coupled lines Using Finite Element Analysis (유한요소해석을 이용한 비대칭 평면형 결합선로 설계)

  • Youn, Jae-Ho;Park, Jun-Seok;Ahn, Dal;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1841-1843
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    • 2001
  • Asymmetrical parallel coupled lines are used in a number of circuits such as multi-band coupler and combline type band pass filter. Although graphical results and formulas are available for the design of coupled lines, the design procedure is hard to use, because even- and odd- mode impedances are always expressed in terms of the physical geometry. In this paper, we introduce a method to find design parameter using finite element analysis. By employing the capacitance obtained by FE analysis, design parameters for each lines are extracted. To show the validity of extracted design parameter for asymmetrical parallel coupled line, we have designed and simulated a planar type combline band pass filter.

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Semi-lumped Balun Transformer using Coupled LC Resonators

  • Park, Jongcheol;Yoon, Minkyu;Park, Jae Yeong
    • Journal of Electrical Engineering and Technology
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    • v.10 no.3
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    • pp.1154-1161
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    • 2015
  • This paper presents a semi-lumped balun transformer using conventional PCB process and its design theory and geometry for the maximally flat response and wide bandwidth using magnetically coupled LC resonators. The proposed balun is comprised of two pairs of coupled resonators which share one among three LC resonators. It provides an identical magnitude and phase difference of 180° between two balanced ports with DC isolation and an impedance transformation characteristic. Theoretical design and analysis were performed to optimize the inductance and capacitance values of proposed balun device for obtaining the wide bandwidth and maximally flat response in its pass-band. Three balun transformers with a center frequency of 500 MHz were demonstrated for proving the concept of design proposed. They were fabricated by using lumped chip capacitors and planar inductors embedded into a conventional 4-layered PCB substrate. They exhibited a maximum magnitude difference of 0.8 dB and phase difference within 2.4 degrees.

Chaos Synchronization of Chua's Circuit with Transmission Line (전송선로를 가진 Chua 회로에서의 카오스 동기화)

  • Ko, Jae-Ho;Bae, Young-Chul;Yim, Hwa-Young
    • Proceedings of the KIEE Conference
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    • 1997.07b
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    • pp.633-635
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    • 1997
  • In this paper, a transmitter and a receiver using two identical Chua's circuits are proposed and a wire synchronizations are investigated. As several problems have been found in both the drive-response synchronization and the coupled synchronization in the previous researches, a new drive-coupled synchronization theory is proposed that can be applicable to wire communication. Since the synchronization of the wire transmission system is impossible by coupled synchronization, theory having both the drive-response and the coupled synchronization is proposed. As a result, the chaos synchronization has delay characteristics in the wire transmission system caused by the line parameters L and C.

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A Multi-Level Simulation Technique for Large-ScaleAnalog Integrated Circuits

  • Yang Jeemo
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1998.10a
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    • pp.827-834
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    • 1998
  • This paper describes a multi-level simulation technique and its implementation, which accurately solve voltages and currents of circuits descreibed at mixed levels of abstractions. A metho to form a tightly coupled simulation environment is proposed and, starting from a description of a circuit, simulation set-up and analysis procedure of the multi-level simulator for a transient response are presented. Circuit and behavioral simulation techniques and their implementations composing the multi-level simulation are explained in detail. Most of the algorithms implemented in the simulation are based upon the standard simulation techniques in order to obtain the reliability and accuracy of conventinoal simulators. Simulation examples show that the multi-level simulator can analyze circuits containing highly nonlinear behavioral models without loss of accuracy provided the behavioral models are accurate enough.

Optimal design of a piezoelectric passive damper for vibrating plates

  • Yun, Chul-Yong;Kim, Seung-Jo
    • International Journal of Aeronautical and Space Sciences
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    • v.7 no.2
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    • pp.42-49
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    • 2006
  • In this paper, an efficient piezoelectric passive damper is newly devised to suppress the multi-mode vibration of plates. To construct the passive damper, the piezoelectric materials are utilized as energy transformer, which can transform the mechanical energy to electrical energy. To dissipate the electrical energy transformed from mechanical energy, multiple resonant shunted piezoelectric circuits are applied. The dynamic governing equations of a coupled electro-mechanical piezoelectric with multiple piezoelectric patches and multiple resonant shunted circuits is derived and solved for the one edge clamped plate. The equations of motion of the piezoelectrics and shunted circuits as well as the plate are discretized by finite element method to estimate more exactly the effectiveness of the piezoelectric passive damper. The method to find the optimal location of a piezoelectric is presented to maximize effectiveness for desired modes. The electro-mechanical coupling term becomes important parameter to select the optimal location.

Timing Simulator by Waveform Relaxation Considering the Feedback Effect (피이드백 효과를 고려한 파형이완 방식에 의한 Timing Simulator)

  • Jun, Young Hyun;Lee, Chang Woo;Lee, Kijun;Park, Song Bai
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.2
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    • pp.347-354
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    • 1987
  • Timing simulators are widely used nowadays for analyzing large-scale MOS digital circuits, which, however, have several limitations such as nonconvergence and/or in accuracy for circuits containing tightly coupled feedback elements or loops. This paper describes a new timing simulator which aims at solving these problems. The algorithm employed is based on the wave-form relaxation method, but exploits the signal flow along the feedback loops. Each of feedback loops is treated as one circuit block and then local iterations are performed to enhance the timing simulation. With these techniques, out simulator can analyze the MOS digital circuits with up to 5-20 times of the magnitude speed improvemnets as compared to SPICE2, while maintaining the accuracy.

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A Novel High Step-Up Converter with a Switched-Coupled-Inductor-Capacitor Structure for Sustainable Energy Systems

  • Liu, Hongchen;Ai, Jian;Li, Fei
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.436-446
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    • 2016
  • A novel step-up DC-DC converter with a switched-coupled-inductor-capacitor (SCIC) which successfully integrates three-winding coupled inductors and switched-capacitor techniques is proposed in this paper. The primary side of the coupled inductors for the SCIC is charged by the input source, and the capacitors are charged in parallel and discharged in series by the secondary windings of the coupled inductor to achieve a high step-up voltage gain with an appropriate duty ratio. In addition, the passive lossless clamped circuits recycle the leakage energy and reduce the voltage stress on the main switch effectively, and the reverse-recovery problem of the diodes is alleviated by the leakage inductor. Thus, the efficiency can be improved. The operating principle and steady-state analyses of the converter are discussed in detail. Finally, a prototype circuit at a 50 kHz switching frequency with a 20-V input voltage, a 200-V output voltage, and a 200-W output power is built in the laboratory to verify the performance of the proposed converter.

Study of the Wearable Electrocardiogram Measuring System using Capacitive-coupled Electrode (정전 용량성 결합 전극을 이용한 웨어러블 심전도 측정 시스템 설계에 관한 연구)

  • Lee, Jae-Ho;Lee, Young-Jae;Lee, Kang-Hwi;Kang, Seng-Jin;Kim, Kyeung-Nam;Park, Hee-Jung;Lee, Jeong-Whan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.10
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    • pp.1448-1454
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    • 2014
  • In this study, a new type of electrode device is implemented to measure the capacitance energy and interpret it as the ECG (Electrocardiogram) data. The main idea of this new electrode system is to estimate the capacitance on the skin by assembling a capacitive-coupled circuits and translate into the ECG signal. To measure the coupling energy and estimate the aquired data in terms of heart activity, the capacitive-coupled electrode is garmented with fabrics in the form of a chest band or a vest jacket. To compare the ECG data from the capacitive-coupled electrode with the conventional electrode(Ag-AgCl) system, the corelation coefficient between two signals is computed as 0.9517. Thus, we can conclude the fact that capacitive-coupled electrode system can measure a person's heart activity without any contact to his or her skin and can the interpreted as the ECG data.

A Millimeter-Wave LC Cross-Coupled VCO for 60 GHz WP AN Application in a 0.13-μm Si RF CMOS Technology

  • Kim, Nam-Hyung;Lee, Seung-Yong;Rieh, Jae-Sung
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.4
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    • pp.295-301
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    • 2008
  • Recently, the demand on mm-wave (millimeter-wave) applications has increased dramatically. While circuits operating in the mm-wave frequency band have been traditionally implemented in III-V or SiGe technologies, recent advances in Si MOSFET operation speed enabled mm-wave circuits realized in a Si CMOS technology. In this work, a 58 GHz CMOS LC cross-coupled VCO (Voltage Controlled Oscillator) was fabricated in a $0.13-{\mu}m$ Si RF CMOS technology. In the course of the circuit design, active device models were modified for improved accuracy in the mm-wave range and EM (electromagnetic) simulation was heavily employed for passive device performance predicttion and interconnection parasitic extraction. The measured operating frequency ranged from 56.5 to 58.5 GHz with a tuning voltage swept from 0 to 2.3 V. The minimum phase noise of -96 dBc/Hz at 5 MHz offset was achieved. The output power varied around -20 dBm over the measured tuning range. The circuit drew current (including buffer current) of 10 mA from 1.5 V supply voltage. The FOM (Figure-Of-Merit) was estimated to be -165.5 dBc/Hz.

Numerical Investigation of Tunable Band-pass\band-stop Plasmonic Filters with Hollow-core Circular Ring Resonator

  • Setayesh, Amir;Mirnaziry, Sayyed Reza;Abrishamian, Mohammad Sadegh
    • Journal of the Optical Society of Korea
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    • v.15 no.1
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    • pp.82-89
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    • 2011
  • In this paper, we numerically study both band-pass and band-stop plasmonic filters based on Metal-Insulator-Metal (MIM) waveguides and circular ring resonators. The band-pass filter consists of two MIM waveguides coupled to each other by a circular ring resonator. The band-stop filter is made up of an MIM waveguide coupled laterally to a circular ring resonator. The propagating modes of Surface Plasmon Polaritons (SPPs) are studied in these structures. By substituting a portion of the ring core with air, while the outer dimensions of the ring resonator are kept constant, we illustrate the possibility of red-shift in resonant wavelengths in order to tune the resonance modes of the proposed filters. This feature is useful for integrated circuits in which we have limitations on the outer dimensions of the filter structure and it is not possible to enlarge the dimension of the ring resonator to reach to longer resonant wavelengths. The results are obtained by a 2D finite-difference time-domain (FDTD) method. The introduced structures have potential applications in plasmonic integrated circuits and can be simply fabricated.