• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.11
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• pp.2067-2080
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• 1994

Recently, joint blind equalization and carrier recovery for digital mobile transmission system is of growing interest. In this paper, we describe new receiver structure of joint godard blind equalizer and various recovery loop for QAM modulated signal. After a brief review of Godard blind equalizer and MAP estimation Costas loop, Generalized Costas loop, Leclert loop, Angular form loop, we present two kinds of receiver structures for joint blind equalization and carrier recovery. Using a Monto Carlo simulation technique, we can confirm that two kinds of receiver structures operate very well in the steady state.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.3
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• pp.37-45
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• 1982

This paper is a sequel of the Part I paper[1] on the modified digital Costas loop. In this Part II we analyze the performance of the system in the presence of noise. It is shown that, when the input signal is corrupted by additive white Gaussian noise, the noise process in the loop becomes Rician as a result of the tan-1 (.) function of the phase error detector. Steady state probability density functions of phase errors of the first-and second-order loops have been obtained by solving the Chapman-Kolmogorov equation numerically. Also, the mean and variance of phase error in the steady state have been obtained analytically, and are compared with the results obtained by computer simulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.2
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• pp.38-50
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• 1982

A new type of digital phase-locked loop (DPLL) called the modified digital Costas loop is proposed and analyzed. The main feature of the proposed loop is that the phase error detector of the loop has linear characteristic. This results from the use of the tan-1 (.) function in the loop. Accordingly, the DPLL can be characterized by a modulo-2$\pi$ linear difference equation. This paper is diveide into two parts. In Part I we describe the proposed system, and analyze the performance of the first-and second-order loops in the absence of noise by the Phase Plane technique. The locking ranges for the DPLL's to achieve exact locking independently of initial conditions have been obtained in closed forms. Also, the false lock and oscillation phenomena occurring under some initial conditions have been considered. These results have been verified by computer simulation. In Part ll we analyze the proposed system in the presence of noise. The steady state probability density function, mean and variance of the phase error have been obtained by solving the Chapman-Kolmogorov equation. These results will be presented in Part ll.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.12C
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• pp.1029-1034
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• 2010

For All Digital QPSK receivers, a phase recovery scheme is required to fix the arbitrarily rotated I/Q quadrature signals due to the transmission path and clock mismatch between the transmitter and the receiver. The conventional Costas phase recovery loop scheme requires a separate AGC(Automatic Gain Control) to obtain the performance independent of input signal power. This paper proposes a simple scheme which separates the phase and amplitude of the input signal via CORDIC algorithm and performs the phase recovery and amplitude compensation simultaneously. The proposed scheme can considerably reduce the logic resources in hardware implementation, has been verified by C++ and Model Sim simulations.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.12
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• pp.526-533
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• 2006

In this paper, we presented the synchronization module between RF shower system and RFID Reader to extend interrogating range on Mobile RFID system, Costas Loop and FPLL(Frequency/phase Lock Loop) were used. We achieved compromised range of 3MHz locking frequency, 1ms locking time and figured out remarkable Hopping frequency of the Reader. The prototype of the new designed RFID system has been tested with ISO18000-6 type-B Tag. The read range between designed RFID Reader and Tag has been measured, it increased triple times by adjusting the Shower system output level.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.6
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• pp.1061-1068
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• 2017

A RVDT is a sensor that measures angular displacement and the output signal of RVDT is a DSBSC-AM signal. For this reason, a DSBSC-AM demodulation processor is required to determine the angular displacement from the output signal. In this paper, DADC(Digital Angle to DC) which extracts the angular displacement from the output signal of a RVDT is implemented based-on modified Costas Loop usually used in the demodulation of DSBSC-AM signal by using FPGA. DADC can used with both 4-wire and 5-wire RVDTs and can exactly compensate the phase difference between the input excitation and output signals of a RVDT unlike the conventional analog RVDT signal conditioners which require external components. Since digital signal processing technique that can enhance the linearity is exploited, DADC shows 0.035% linearity error, which is smaller than 0.005% that of a conventional analog signal conditioner. The DADC are tested in an integrated experimental environment which includes a commercial RVDT sensor, ADC and an analog output block.