• Journal of information and communication convergence engineering
• /
• 제18권4호
• /
• pp.222-229
• /
• 2020

Recent multi-core processors for smart devices use per-core dynamic voltage and frequency scaling (DVFS) that enables independent voltage and frequency control of cores. However, because the conventional task scheduler was originally designed for per-core DVFS disabled processors, it cannot effectively utilize the per-core DVFS and simply allocates tasks evenly across all cores to core utilization with the same CPU frequency. Hence, we propose a novel task scheduler to effectively utilize percore DVFS, which enables each core to have the appropriate frequency, thereby improving performance and decreasing energy consumption. The proposed scheduler classifies applications into two types, based on performance-sensitivity and allows a performance-sensitive application to have a dedicated core, which maximizes core utilization. The experimental evaluations with a real off-the-shelf smart device showed that the proposed task scheduler reduced 13.6% of CPU energy (up to 28.3%) and 3.4% of execution time (up to 24.5%) on average, as compared to the conventional task scheduler.

• 임상간호연구
• /
• 제23권2호
• /
• pp.189-201
• /
• 2017

Purpose: The aim of this study was to develop the nursing management core task and competency matrix for hospital unit managers. The perceived level of importance and performance of identified core competencies by unit managers were also investigated. Methods: Literature review and expert survey identified nursing management core task and competencies. Subsequently, the core task and competency matrix was developed and validated by expert panel. A survey of 196 nurse managers from 3 cities identified perceived importance and performance of core competiences. Results: Thirty-eight nursing management core task and thirty-seven nursing management core competencies were identified comprising five categories; Clinical practice knowledge, Evidence-based practice, Employee development, Strategic planning and Initiative. Based on the core task and competencies, the task and competency matrix for unit managers was developed. In the analysis of importance and performance of core competencies, the mean score of importance ($3.50{\pm}0.30$) was higher than the mean score of performance ($3.03{\pm}0.34$). Conclusion: The development of core task and competencies for unit managers in hospitals provides a guide for the development and evaluation of programs designed to increase competence of unit managers.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• 제12권11호
• /
• pp.5465-5480
• /
• 2018

Energy-efficient task scheduling on multi-core server is a fundamental issue in green cloud computing. Multi-core processors are widely used in mobile devices, personal computers, and servers. Existing energy efficient task scheduling methods chiefly focus on reducing the energy consumption of the processor itself, and assume that the cores of the processor are controlled independently. However, the cores of some processors in the market are divided into several voltage islands, in each of which the cores must operate on the same status, and the cost of the server includes not only energy cost of the processor but also the energy of other components of the server and the cost of user waiting time. In this paper, we propose a cost-aware scheduling algorithm ICAS for computation intensive tasks on multi-core server. Tasks are first allocated to cores, and optimal frequency of each core is computed, and the frequency of each voltage island is finally determined. The experiments' results show the cost of ICAS is much lower than the existing method.

• 산업경영시스템학회지
• /
• 제47권3호
• /
• pp.8-17
• /
• 2024

There is a demand for introducing a challenging and innovative R&D system to develop new technologies to generate weapon system requirements. Despite the increasing trend in annual core technology development tasks, the infrastructure expansion, including personnel in research management institutions, is relatively insufficient. This situation continuously exposes difficulties in task planning, selection, execution, and management. Therefore, there is a pressing need for strategies to initiate timely research and development and enhance budget execution efficiency through the streamlining of task agreement schedules. In this study, we propose a strategic model utilizing a flexible workforce model, considering constraints and optimizing workload distribution through resource allocation to minimize bottlenecks for efficient task agreement schedules. Comparative analysis with the existing operational environment confirms that the proposed model can handle an average of 67 more core technology development tasks within the agreement period compared to the baseline. In addition, the risk management analysis, which considered the probabilistic uncertainty of the fluctuating number of core technology research and development projects, confirmed that up to 115 core technology development can be contracted within the year under risk avoidance.

• 한국컴퓨터정보학회논문지
• /
• 제16권6호
• /
• pp.11-20
• /
• 2011

본 논문에서는 DVFS 기능을 제공하는 멀티코어 프로세서 상에서 실시간 비디오 태스크의 에너지 소모량을 최소화하는 최적 스케쥴링 기법을 제안한다. 제안된 스케쥴링 기법은 멀티코어의 병렬처리 기법을 활용하도록 적절한 수의 멀티코어들을 태스크의 수행에 할당하고, 사용되지 않는 코어들의 전원을 끄며, 실시간 태스크의 데드라인을 만족하는 최저 클락 주파수를 배정한다. 단일 코어에서 태스크를 실행하는 기존 방법과 그리고 모든 코어들에서 태스크를 실행하는 기존 방법을 제안된 스케쥴링 기법과 비교하는 실험 결과에서, 제안된 스케쥴링 기법이 기존 방법들의 에너지 소모량을 각각 최대 67%, 89% 감소시킴을 확인하였다.

• 한국자동차공학회논문집
• /
• 제24권2호
• /
• pp.127-136
• /
• 2016

The camera based object detection systems should satisfy the recognition performance as well as real-time constraints. Particularly, in safety-critical systems such as Autonomous Emergency Braking (AEB), the real-time constraints significantly affects the system performance. Recently, multi-core processors and system-on-chip technologies are widely used to accelerate the object detection algorithm by distributing computational loads. However, due to the advanced hardware, the complexity of system architecture is increased even though additional hardwares improve the real-time performance. The increased complexity also cause difficulty in migration of existing algorithms and development of new algorithms. In this paper, to improve real-time performance and design complexity, a task scheduling strategy is proposed for visual object tracking systems. The real-time performance of the vision algorithm is increased by applying pipelining to task scheduling in a multi-core processor. Finally, the proposed task scheduling algorithm is applied to crosswalk detection and tracking system to prove the effectiveness of the proposed strategy.

• 한국콘텐츠학회논문지
• /
• 제11권5호
• /
• pp.328-337
• /
• 2011

본 연구는 종업원의 태도에 영향을 주는 직무특성을 확인하기 위하여, 인적자원관리의 관점에서 소상공인의 핵심직무특성(기술다양성, 과업정체성, 과업중요성, 자율성, 피드백)과 태도(직무만족, 조직몰입, 이직의도)간의 관계를 확인하는데 연구목적이 있다. 이러한 연구목적을 달성하기 위하여 국내 기업의 종업원 315명을 대상으로 소상공인의 핵심직무특성이 태도에 미치는 영향, 소상공인의 핵심직무특성과 태도간의 관계에서 성장욕구강도의 조절효과 등을 분석하였다. 회귀분석결과 기술다양성과 과업중요성은 직무만족에 정(+)의 영향을, 기술다양성과 피드백은 조직몰입에는 정(+)의 영향을 그리고 이직의도에 부(-)의 영향을 미치는 것으로 나타났고, 성장욕구강도의 조절효과는 과업중요성과 이직의도간의 관계에서만 발견되었다. 마지막으로 이러한 연구결과를 토대로 소상공인의 직무 태도 증진 방안과 경영전략적 시사점을 제시하였다.

• ETRI Journal
• /
• 제37권1호
• /
• pp.118-127
• /
• 2015

The power consumption of 3D many-core processors can be reduced, and the power delivery of such processors can be improved by introducing voltage island (VI) design using on-chip voltage regulators. With the dramatic growth in the number of cores that are integrated in a processor, however, it is infeasible to adopt per-core VI design. We propose a 3D many-core processor architecture that consists of multiple voltage clusters, where each has a set of cores that share an on-chip voltage regulator. Based on the architecture, the steady state temperature is analyzed so that the thermal characteristic of each voltage cluster is known. In the voltage scaling and task scheduling stages, the thermal characteristics and communication between cores is considered. The consideration of the thermal characteristics enables the proposed VI formation to reduce the total energy consumption, peak temperature, and temperature gradients in 3D many-core processors.

• 한국산업정보학회논문지
• /
• 제26권5호
• /
• pp.11-19
• /
• 2021

본 논문에서는 각 코어의 마일리지를 기반으로 하는 비대칭 멀티코어 프로세서의 스케줄링 기법을 제안한다. 저전력을 소비하며 일반성능을 갖는 LITTLE 코어와 고성능을 갖춘 대신 고전력을 소비하는 big 코어로 구성된 big-LITTLE 멀티코어 프로세서 구조를 고려하였다. 시스템에 태스크가 도착하여 처리해야 할 때, 프로세서는 태스크를 처리할 코어 유형(big 또는 LITTLE)을 먼저 결정한 다음 유휴 중인 코어들 가운데서 마일리지가 가장 작은 코어를 조사하여 해당 작업을 코어에 할당한다. 비대칭 멀티코어 할당을 위한 마일리지 기반 밸런싱 알고리즘을 개발하였으며 제안한 스케줄링 기법이 시스템 관리 관점에서 기존 방식보다 더 비용 효율적임을 보인다. 또한 시뮬레이션을 수행하여 제안한 알고리즘의 성능을 평가한다.

• 수산해양교육연구
• /
• 제23권3호
• /
• pp.433-444
• /
• 2011

The purpose of this study is to examine the task of the policy on the collecting cargoes of the Japanese container ports. Although the ports of Asia countries such as China, South Korea have increased the amount of cargoes dramatically since the latter half of 1990s, the amount of cargoes Japanese container ports deal with have increased within narrow limits. As a result of this trend, the position of Japanese ports as hub-ports has been falling down. The times of main liners linked with North America and Europe stopping at Japanese ports have continued to decrease. So Japan container ports need the policy to increase the amount of cargoes in order to avoid becoming feeder ports. This policy is to collect domestic cargoes which are transshipped in Asia ports such as Busan port from Japanese regional ports to core ports. By collecting domestic cargoes to Japanese core ports intensively, the times of international main liners stopping at Japanese core ports will increase. It's important to support the domestic liners linking between Japanese regional ports and core ports in order to collecting domestic cargoes to Japanese core ports effectively. In addition the role of Japanese government to achieve the coordination between Japanese regional ports and core ports is indispensable.