• Journal of the Korean institute of surface engineering
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• v.38 no.1
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• pp.28-36
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• 2005

In this study, the reflow characteristics of copper thin films which is expected to be used as interconnection materials in the next generation semiconductor devices were investigated. Cu thin films were deposited on the TaN diffusion barrier by metal organic chemical vapor deposition (MOCVD) and annealed at the temperature between 250℃ and 550℃ in various ambient gases. When the Cu thin films were annealed in the hydrogen ambience compared with oxygen ambience, sheet resistance of Cu thin films decreased and the breakdown of TaN diffusion barrier was not occurred and a stable Cu/TaN/Si structure was formed at the annealing temperature of 450℃. In addition, reflow properties of Cu thin films could be enhanced in H₂ ambient. With Cu reflow process, we could fill the trench patterns of 0.16～0.24 11m with aspect ratio of 4.17～6.25 at the annealing temperature of 450℃ in hydrogen ambience. It is expected that Cu reflow process will be applied to fill the deep pattern with ultra fine structure in metallization.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.1
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• pp.24-29
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• 2005

Chemical mechanical polishing (CMP) has been widely accepted for the global planarization of multi-layer structures in semiconductor manufacturing. Copper has been the candidate metallization material for ultra-large scale integrated circuits (ULSIs), owing to its excellent electro-migration resistance and low electrical resistance. However, it still has various problems in copper CMP process. Thus, it is important to understand the effect of the process variables such as turntable speed, head speed, down force and back pressure are very important parameters that must be carefully formulated in order to achieve desired the removal rates and non-uniformity. Using a design of experiment (DOE) approach, this study was performed investigating the main effect of the variables and the interaction between the various parameters during CMP. A better understanding of the interaction behavior between the various parameters and the effect on removal rate, non-uniformity and ETC (edge to center) is achieved by using the statistical analysis techniques. In the experimental tests, the optimum parameters which were derived from the statistical analysis could be found for higher removal rate and lower non-uniformity through the above DOE results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.174-175
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• 2007

A programmable metallization cell (PMC) memory structure with copper-saturated GeTe solid electrolyte films doped by nitrogen was prepared on a TiW bottom electrode by a co-sputtering technique at room temperature. The $Ge_{45}Te_{55}$ solid electrolyte films deposited with various $N_2$/Ar flow ratios showed an increase of crystallization temperature and especially, the electrolyte films deposited at $N_2$/Ar ratios above 30% showed a crystallization temperature above $400^{\circ}C$, resulting in surviving in a back-end process in semiconductor memory devices. The device with a 200 nm thick $Cu_{1-x}(Ge_{45}Te_{55})_x$ electrolyte switches at 1 V from an "off " state resistance, $R_{off}$, close to $10^5$ to an "on" resistance state, Ron, more than 20rders of magnitude lower for this programming current.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.377-377
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• 2012

Microprocessor technology now relies on copper for most of its electrical interconnections. Because of the high diffusivity of copper, Atomic layer deposition (ALD) $TaN_x$ is used as a diffusion barrier to prevent copper diffusion into the Si or $SiO_2$. Another problem with copper is that it has weak adhesion to most materials. Strong adhesion to copper is an essential characteristic for the new barrier layer because copper films prepared by electroplating peel off easily in the damascene process. Thus adhesion-enhancing layer of cobalt is placed between the $TaN_x$ and the copper. Because, cobalt has strong adhesion to the copper layer and possible seedless electro-plating of copper. Until now, metal film has generally been deposited by physical vapor deposition. However, one draw-back of this method is poor step coverage in applications of ultralarge-scale integration metallization technology. Metal organic chemical vapor deposition (MOCVD) is a good approach to address this problem. In addition, the MOCVD method has several advantages, such as conformal coverage, uniform deposition over large substrate areas and less substrate damage. For this reasons, cobalt films have been studied using MOCVD and various metal-organic precursors. In this study, we used $C_{12}H_{10}O_6(Co)_2$ (dicobalt hexacarbonyl tert-butylacetylene, CCTBA) as a cobalt precursor because of its high vapor pressure and volatility, a liquid state and its excellent thermal stability under normal conditions. Furthermore, the cobalt film was also deposited at various $H_2/NH_3$ gas ratio(1, 1:1,2,6,8) producing pure cobalt thin films with excellent conformality. Compared to MOCVD cobalt using $H_2$ gas as a reactant, the cobalt thin film deposited by MOCVD using $H_2$ with $NH_3$ showed a low roughness, a low resistivity, and a low carbon impurity. It was found that Co/$TaN_x$ film can achieve a low resistivity of $90{\mu}{\Omega}-cm$, a low root-mean-square roughness of 0.97 nm at a growth temperature of $150^{\circ}C$ and a low carbon impurity of 4~6% carbon concentration.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.383-383
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• 2010

TiN is one of the mostly used barrier materials in copper metallization because of low friction coefficient and superior electrical properties. We need to investigate for the etching characteristic of TiN. In this study, we investigated about etching characteristic of TiN using $BCl_3$/Ar inductively coupled plasma system. The etch rate was measured by a depth pro filer. The chemical etching reactions of the TiN surface was investigated X-ray photoelectron spectroscopy.

• Journal of Information Display
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• v.12 no.2
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• pp.89-92
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• 2011

Advanced static DC magnetron sputtering methods based on the magnet wobbling technique were investigated to achieve highly uniform and homogeneous metallization layers. The novel split sputter mode (SSM) method, wherein the deposition process is divided into two distinct steps, enables the AKT rotary cathode technology to provide excellent layer properties, while keeping a high production throughput. The effectiveness of theSSMtechnique was demonstrated through copper-coated large-area substrates.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.2
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• pp.97-101
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• 2003

New Pt/Ti and hi/Ti double-metal structures have been investigated for the application of a diffusion barrier between Cu and Si in deep submicron integrated circuits. Pt/Ti and Ni/Ti were deposited using E-beam evaporator at room temperature. The performance of Pt/Ti and Ni/Ti structures as diffusion barrier against Cu diffusion was examined by charge pumping method, gate leakage current, junction leakage current, and SIMS(secondary ion mass spectroscopy). These evaluation indicated that Pt/Ti(200${\AA}$/100${\AA}$) film is a good barrier against Cu diffusion up to 450$^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.93-94
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• 2005

Cu metallization using electrochemical plating(ECP) has played an important role in back end of line(BEOL) interconnect formation. In this work, we studied the optimized copper thickness using Bottom-up Gap-fill in Cu ECP, which is closely related with the pattern dependencies in Cu ECP and Cu dual damascene process at 0.13 ${\mu}m$ technology node. In order to select an optimized Cu ECP thickness, we examined Cu ECP bulge, Cu CMP dishing and electrical properties of via hole and line trench over dual damascene patterned wafers split into different ECP Cu thickness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.57-58
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• 2006

Chemical-mechanical planarization (CMP) of Cu has used currently in semiconductor process for multilevel metallization system. This process requires the application of a considerable down-pressure to the sample in the polishing, because porous low-k films used in the Cu-multilevel interconnects of 65nm technology node are often damaged by mechanical process. Also, it make possible to reduce scratches and contaminations of wafer. Electrochemical mechanical planarization (ECMP) is an emerging extension of CMP. In this study, the electrochemical mechanical polisher was manufactured. And the static and dynamic potentiodynamic curve of Cu were measured in KOH based electrolyte and then the suitable potential was found.

• 한국태양에너지학회:학술대회논문집
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• 2009.04a
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• pp.225-229
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• 2009

The front metal contact is one of the most important element influences in efficiency in the silicon solar cell. First of all selective of the material and formation method is important in metal contacts. Commercial solar cells with screen-printed contacts formed by using Ag paste process is simple relatively and mass production is easy. But it suffer from a low fill factor and a high shading loss because of high contact resistance. Besides Ag paste too expensive. because of depends income. This paper applied for Ni/Cu metallization replace for paste of screen printing front metal contact. Low cost Ni and Cu metal contacts have been formed by using electroless plating and electroplating techniques to replace the screen-printed Ag contacts. Ni has been proposed as a suitable silicide for the salicidation process and is expected to replace conventional silicides. Copper is a promising material for the electrical contacts in solar cells in terms of conductivity and cost. In experiments Ni/Cu metal contact applied same grid formation of screen-printed solar cell. And it has variation of different grid spacing. It was verified that the wide spacing of grid finger could increase the series resistance also the narrow spacing of grid finger also implies a grid with a higher density of grid fingers. Through different grid spacing found alteration of efficiency.