• Proceedings of the KIEE Conference
• /
• 2001.07b
• /
• pp.1020-1022
• /
• 2001

because the output of solar cell is direct, it is necessary to install D/A converter system for A.C load, and in case of driving utility line system, it is possible to drive system relation when the system supplies sinusodal current ant voltage having unit power factor. As the characteristics of the soar cell output the is influenced by dailysunight charge, for more electric power it is essential to control the direction toward the san so that the driving point of solar cell can always operate near maximum output point. PWM modulation device among electric power converters must have stable modulation at anytime when it includes noise-factors such as noise-wave and noises on electric voltage wave, a synchronous signal system. In dealing with synchronous signal for control and control signal by microprocessor, it is necessary to compensate it because there is time difference between sample paint and carrier wave. On this papers, single phase PWM current type invertor controled the solar cell having typical voltage dropping character has optimun short current in short, reduces D.C reactance, composes controller for modulation and keeps lower harmonic and high power factor keeping maximum output of solar cell according daily sunlight charge variation.

• Journal of Power Electronics
• /
• v.18 no.2
• /
• pp.627-639
• /
• 2018

The fact that the reliability of IGBTs has become a more and more significant aspect of power converters has resulted in an increase in the research on the open circuit (OC) fault location of IGBTs. When an OC fault occurs, a zero-current phenomena exists and frequently appears, which can be found in a lot of the existing literature. In fact, fault variables have a very high correlation with the zero-current interval. In some cases, zero-current interval actually decides the most significant fault feature. However, very few of the previous studies really explain or prove the zero-current phenomena of the fault current. In this paper, the zero-current phenomena is explained and verified through mathematical derivation, based on two-level and three-level NPC static var generators (SVGs). Mathematical models of single OC fault are deduced and it is concluded that a zero-current interval with a certain length follows the OC faults for both two-level and NPC three-level SVGs. Both inductive and capacitive reactive power situations are considered. The unbalanced load situation is discussed. In addition, simulation and experimental results are presented to verify the correctness of the theoretical analysis.

• Journal of Power Electronics
• /
• v.18 no.2
• /
• pp.558-572
• /
• 2018

In addition to its modular nature, a Hybrid Modular Multilevel Converter (HMMC) assembled from half-bridge and full-bridge sub-modules, is able to block DC faults with a minimum number of switching devices, which makes it attractive for high power applications. This paper introduces a control strategy based on the Root-Least Square (RLS) algorithm to estimate the capacitor voltages instead of using direct measurements. This action eliminates the need for voltage transducers in the HMMC sub-modules and the associated communication link with the central controller. In addition to capacitor voltage balancing and suppression of circulating currents, a fault tolerant control unit (FTCU) is integrated into the proposed strategy to modify the parameters of the HMMC controller. On advantage of the proposed FTCU is that it does not need extra components. Furthermore, a fault detection unit is adapted by utilizing a hybrid estimation scheme to detect sub-module faults. The behavior of the suggested technique is assessed using PSCAD offline simulations. In addition, it is validated using a real-time digital simulator connected to a real time controller under various normal and fault conditions. The proposed strategy shows robust performance in terms of accuracy and time response since it succeeds in stabilizing the HMMC under faults.

• Korean Journal of Optics and Photonics
• /
• v.14 no.5
• /
• pp.509-514
• /
• 2003

Mach-Zehnder interferometric wavelength converters with monolithically integrated semiconductor optical amplifiers (SOA's) have been fabricated and characteristics of wavelength conversion at 10 Gb/s have been investigated for wavelength span of 40 nm. The devices have been achieved by using a butt-joint combination of buried ridge structure type SOA's and passive waveguides. In the integration, a new method has been applied that removes p+InP cladding layer leading to high propagation loss and forms simultaneously the current blocking and the cladding layer using undoped InP. The module packaging has been achieved by using a titled fiber array for effective coupling into the tilted waveguide in the wavelength converter. Using the module, wavelength conversion with power penalty lower than 1 ㏈ at 10 Gb/s has been demonstrated for wavelength span of 40 nm. In addition, it is show that the module can provide 2R (re-amplification, re-shaping) operation by demonstrating the conversion with the negative penalty.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.42 no.11
• /
• pp.981-987
• /
• 2014

DC/DC switching power converters are commonly used to generate a regulated DC output voltage with high efficiency. The DC/DC converter is composed of a MOSFET (metal-oxide semiconductor field effect transistor), a PWM-IC (pulse width modulation-integrated circuit) controller, inductor, capacitor, etc. It is shown that the variation of threshold voltage and the breakdown voltage in the electrical characteristics of MOSFET occurs by radiation effects in TID (Total Ionizing Dose) testing at the low energy ${\gamma}$ rays using $^{60}Co$, and 5 heavy ions make the gate of MOSFET broken in SEGR (Single Event Gate Rupture) testing. TID testing on MOSFET is accomplished up to the total dose of 40 krad, and the cross section($cm^2$) versus LET(MeV/mg/$cm^2$) in the MOSFET operation is studied at SEGR testing after implementation of the controller board.

• Journal of the Korean Institute of Telematics and Electronics C
• /
• v.36C no.5
• /
• pp.48-55
• /
• 1999

This paper describes automatic gain control circuit (AGC) design techniques for CMOS CCD camera interface systems. The required gain of the AGC in the proposed system is controlled directly by digital bits without conventional extra D/A converters and the signal settling behavior is almost independent of AGC gain variation at video speeds. A capacitor-segment combination technique to obtain large capacitance values considerably improves the effective bandwidth of the AGC based on switched-capacitor techniques. A proposed layout scheme for capacitor implementation shows AGC matching accuracy better than 0.1 %. The outputs from the AGC are transferred to a 10b A/D converter integrated on the same chip. The proposed AGC is implemented as a sub-block of a CCD camera interface system using a 0.5 um n-well CMOS process. The prototype shows the 32-dB AGC dynamic range in 1/8-dB steps with 173 mW at 3 V and 25 MHz.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.8
• /
• pp.24-31
• /
• 2008

Power converters are becoming an essential block in modem mobile multimedia application. This paper presents a high performance DC-DC buck converter for mobile applications. Controller of DC-DC buck converter is designed by current-mode control method. An current-mode DC-DC converter is implemented in a standard $0.18{\mu}m$ CMOS process, and the overall die size was $1.2mm^2$. The peak efficiency was 86 % with a switching frequency of $1\sim1.5MHz$ and a maximum load current of 400mA.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.37 no.6
• /
• pp.35-41
• /
• 2000

This paper describes a merged-capacitor switching (MCS) technique to improve the signal Processing speed and resolution of CMOS analog-to-digital converters (ADCs). The proposed MCS technique improves a sampling rate by reducing the number of capacitors used in conventional pipelined ADCs. The ADC capacitor mismatch can be minimized without additional power consumption, die area, and the loss of sampling rate, when the size of each unit capacitor is increased as much as the number of capacitors reduced by the MCS technique. It is verified that the ADC resolution based on the proposed MCS technique is extended further by employing a conventional commutated feedback-capacitor switching (CFCS) technique.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.17 no.6
• /
• pp.486-494
• /
• 2012

In this paper, we proposes the three-phase embedded Z-source inverter consisting of the three embedded Z-source converters and it's the output voltage control method. Each embedded Z-source converter can produce the bipolar output capacitor voltages according to duty ratio D such as single-phase PWM inverter. The output AC voltage of the proposed system is obtained as the difference in the output capacitor voltages of each converter, and the L-C output filter is not required. Because the output AC voltage can be stepped up and down, the boost DC converter in the conventional two-stage inverter is unnecessary. To confirm the validity of the proposed system, PSIM simulation and a DSP based experiment were performed under the condition of the input DC voltage 38V, load $100{\Omega}$, and switching frequency 30kHz. Each converter is connected by Y-connection for three-phase loads. In case that the output phase voltage is the same $38V_{peak}$ as the input DC voltage and is the 1.5 times($57V_{peak}$), the simulation and experimental results ; capacitor voltages, output phase voltages, output line voltages, inductor currents, and switch voltages were verified and discussed.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.6
• /
• pp.514-521
• /
• 2009

This paper deals with a new overvoltage snubber for a diode-clamped 3-level IGBT inverter. Usually most power converters use snubber circuits to protect the switching devices from voltage spike. However, it is difficult for the diode-clamped multi-level converter to be protected from voltage spike with overvoltage snubber since the series connection of the switching devices. To solve the problem the characteristic of a overvoltage snubber for a DC-DC converter is analyzed, and a new snubber for a diode clamped 3-level inverter is proposed. The performance of the proposed snubber is verified through experiments.