• The Journal of the Korea Contents Association
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• v.14 no.2
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• pp.475-481
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• 2014

The aim of this work was to develop the gamma camera system for small animal gamma imaging and environmental radiation monitoring imaging using a parallel hole collimator and pinhole collimator. The small gamma camera system consists of a CsI(Tl) scintillation crystal with 6 mm in thickness and $50{\times}50mm$ in area coupled with a Hamamatsu H8500C PSPMT, are resistive charge divider, pre-amplifiers, charge amplifiers, nuclear instrument modules (NIMs), an analog to digital converter and a computer for control and display. We have developed a radiation monitoring system composed of a combined pinhole gamma camera and a charge-coupled devices (CCD) camera. The results demonstrated that the parallel hole collimator and pinhole collimator gamma camera designed in this study could be utilized to perform small animal imaging and environmental radiation monitoring system. Consequently in this paper, we proved that our gamma detector system is reliable for a gamma camera which can be used as small animal imaging and environmental radiation monitoring system.

• Journal of Korea Multimedia Society
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• v.9 no.12
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• pp.1669-1680
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• 2006

This paper explains that the RF systems for hi-directional wireless capsule endoscopes were designed and implemented. The designed RF systems for a capsule endoscope can transmit the images of intestines from the inside to the outside of a body and the behavior of the capsules can be controlled by an external controller simultaneously. The hi-directional wireless capsule endoscope consists of a CMOS image sensor, FPGA, LED, battery, DC to DC Converter, transmitter, receiver, and antennas. The transmitter and receiver which were used in the hi-directional capsule endoscope, were designed and fabricated with $10mm(diameter){\times}3.2mm(thickness)$ dimensions taking into the MPE, power consumption, system size, signal to noise ratio and modulation method. The RF systems designed and implemented for the hi-directional wireless capsule endoscopes system were verified by in-vivo experiments. As a result, the RF systems for the hi-directional wireless capsule endoscopes satisfied the design specifications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.6
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• pp.1182-1189
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• 1994

In this paper, we evaluate the performance of a fuzzy controller with a self-learning structure. The fuzzy controller is based on a fuzzy logic that approximates and effectively represents the uncertain phenomena of the real world. The fuzzy controller has control of a plant with a fuzzy inference logic. However, it is not easy to decide the membership function of a fuzzy controller and its controlrule. This problem can be solved by designing a self-learning controller that improves its own contropllaw to its goal with a performance table. The fuzzy controller is implemented with a 386PC, an interface board, a D/A converter, a PWM(Pulse Width Modulation) motor drive-circuit, and a sensing circuit, for error and differential of error. Since a Ball and Beam System is used in the experiment, the validity of the fuzzy controller with the self-learning structure can be evaluated through the actual experiment and the computer simulation of the real plant. The self-learning fuzzy controller reduces settling time by just under 10%.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.5
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• pp.209-213
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• 2010

This paper is a study of Car safety network system using sensed data from varied sensors. This hardware will work with various sensors and communication protocols. There are many sensors. Then, I selected 3 sensors for test, which were sonic sensor for distance checking, tilt sensor for rollover and impact sensor for car accident and theft. Also, there are many interfaces for sensor. Therefore I designed hardware to support various sensor interfaces. For instance ADC(Analog to Digital converter), I2C, RS232, RS485, CAN. In this case, sonic sensor have I2C interface, tilt sensor have RS485 interface and Impact sensor have analog interface. In this research, I can gather sensing data from 3 sensors (mentioned above), and sending control signal to other processor with RS232, RS485, CAN communication. So, we can use easily this hardware for many cases of systems, which need sensors.

• Journal of IKEEE
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• v.23 no.4
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• pp.1208-1217
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• 2019

The life-cycle prediction of the sub-module which is the unit system of MMC is very important from the viewpoint of maintenance and economic feasibility of HVDC system. However, the life-cycle prediction that considers only the type, number and combination of parts is a generalized result that does not take into account the operating condition of the sub-module, and may significantly differ from the life-cycle of the actual one. Therefore, we design a fault tree for the purpose of reflecting the operation characteristics of the full-bridge sub-module and apply the MIL-HDBK-217F to the failure rate of the basic event to predict the life-cycle of the full-bridge sub-module. It compares the life-cycle expectancy of the conventional failure rate analysis with the proposed fault-tree analysis and compares the lifetime according to whether the redundancy of the full-bridge sub-module is considered.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.40 no.5
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• pp.332-346
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• 2003

In this paper, a system which can compress and reconstruct the digital image was implemented using 2 dimensional DWT(Discrete Wavelet Transform). The proposed system consists of the FPGA board tocompress the image and the application software(S/W) to reconstruct it. First the FPGA receives the image from AID converter and compresses the image using wavelet transform. The compressed data is transferred into the PC using the PCI interface. The compressed image is reconstructed by an application S/W inside the PC. The image compressor can compress about 60 fields per second, in which the image format was NTSC YCbCr(4:2:2) and the image size was 640${\times}$240 pixels per field. The designed hardware mapped into one FPGA occupying 11,120 LAB (Logic Array Block) and 27,456 ESB(Embedded System Block) in APEX20KC EP20K1000B652-7. It globally uses 33MHz clock and the memory control part uses 100MHz.

• Applied Chemistry for Engineering
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• v.3 no.1
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• pp.24-34
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• 1992

Recent studies dealing with the fundamental understanding and applications of bimetallic catalysts are discussed. Bimetallic catalysts have had a major industrial impact, specifically for the reforming of petroleum naphtha, for the hydrogen reduction of carbon monoxide, and for the three way catalytic converter system. The action of the bimetallic catalysts in these reactions may be interpreted in terms of ensembles, electronic influences and surface structure. Various combinations of metal pairs have been considered in order to evaluate the role played by the added metals. For catalyst selectivity control, the possibility of surface enrichment of one element has been recognised. More generally, the influence of preparative variables on the formation of supported catalysts has been clarified, In particular by temperature programmed reduction (TPR). Information on the structure of bimetallic catalysts has been obtained with chemical probes, such as chemisorption and reaction rate measurement and physical probes, such as extended X-ray absorption fine structure (EXAFS), scanning transmission electron microscopy (STEM) and Xe-NMR.

• Journal of Sensor Science and Technology
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• v.6 no.2
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• pp.115-122
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• 1997

In this paper, on-chp atomatic tuning circuit, using proposed integration level approximation technique, is designed to tuning of the variation of RC time-constant due to aging or temperature variation, etc. This circuit reduces the error, the difference between code values and real outputs of integrator, which is drawback of presented dual-slope tuning circuit and eliminates modulations of processing signals in integrated circuit due to fixed tuning codes during ordinary operation. This system is made up of simple integrator, A/D converter and digital control circuit and all capacitors are replaced by programed capacitor arrays in this system. This tuning circuit with 4 bit resolution achieves $-9.74{\sim}+9.68%$ of RC time constant error for 50% resistance variation.

• Journal of Korean Society of Water and Wastewater
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• v.32 no.4
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• pp.317-324
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• 2018

SWRO-PRO hybrid desalination technology is recently getting more attention especially in large desalination markets such as USA, Middle East, Japan, Singapore, etc. because of its promising potential to recover a considerable amount of osmotic energy from brine (a high-concentration solution of salt, 60,000 - 80,000 mg/L) and also to minimize the impact of the discharged brine into a marine ecosystem. By the research and development of the core technologies of the SWRO-PRO desalination system in a national desalination research project (Global MVP) supported by Ministry of Land, Infrastructure, and Transport (MOLIT) and Korea Agency for Infrastructure Technology Advancement (KAIA), it is anticipated that around 25% of total energy consumption rate (generally 3 to $4kWh/m^3$) of the SWRO desalination can be reduced by recovering the brine's osmotic energy utilizing wastewater treatment effluent as a PRO feed solution and an isobaric pressure exchanger (PX, ERI) as a PRO energy converter. However, there are still several challenges needed to be overcome in order to ultimately commercialize the novel SWRO-PRO process. They include system optimization and integration, development of efficient PRO membrane and module, development of PRO membrane fouling control technology, development of design and operation technology for the system scaling-up, development of diverse business models, and so on. In this paper, the current status and progress of the pilot study of the newly developed SWRO-PRO hybrid desalination technology is discussed.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.78-86
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• 2003

When we transformed from Monochrome-data to Color-data in text mode, we used hardware-method to design the circuit which is convertible in real time. We saved color information in every screens that can make screen in Color Palette ROM and it is also generated 8bit. lower 4bit assign foreground color and upper 4bit can design to have background color. We have Address Reduction ROM to remove repeated address and reduce volume of Color Palette ROM to 1/16. Besides, we have many D-FF to save address, data and page information temporarily after that, we have management process 8 times through counter in real time. Finally, we chose either foreground color or background color in multiplex and established color information was sended to the color video controller. Thus, you can use it as a good interface when yow transfer many control devices with Monochrome display (ex, LCD Monitor) into devices with Color display.