• Title/Summary/Keyword: Consumption mode

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Research on the Implementation of the AES-CCM Security Mode in a High Data-Rate Modem (고속 모뎀에서의 AES-CCM 보안 모드 구현에 관한 연구)

  • Lee, Hyeon-Seok;Park, Sung-Kwon
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.60 no.4
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    • pp.262-266
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    • 2011
  • In high data-rate communication systems, encryption/decryption must be processed in high speed. In this paper, we implement CCM security mode which is the basis of security. Specifically, we combine CCM with AES block encryption algorithm in hardware. With the combination, we can carry out encryption/decryption as well as data transmission/reception simultaneously without reducing data-rate, and we keep low-power consumption with high speed by optimizing CCM block.

A Low-Power Design and Implementation of the Portable Device for Measuring Temperature and Humidity Based On Power Consumption Modeling (소비 전력 모델링에 입각한 휴대용 온습도 측정기의 저전력 설계 및 구현)

  • Lee, Chul-Ho;Hong, Youn-Sik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.2
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    • pp.1027-1035
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    • 2014
  • The most important design factor for portable devices is power consumption. In this paper, in the early design stage of a mobile device which measures temperature and humidity a power consumption model will be proposed and then the overall power consumption will be estimated based on this model. We will verify previously the correctness of such estimated power consumption before implementation of the real device. That is our proposed design methodology based on power consumption model. An improved design method for efficiently reducing the current consumption in the idle mode is also presented. By implementing a real prototype of the mobile device for measuring temperature and humidity, the correctness of our proposed design methodology based on power consumption modeling will be verified.

Fuzzy-sliding mode control of a full car semi-active suspension systems with MR dampers

  • Zheng, L.;Li, Y.N.;Baz, A.
    • Smart Structures and Systems
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    • v.5 no.3
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    • pp.261-277
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    • 2009
  • A fuzzy-sliding mode controller is presented to control the dynamics of semi-active suspension systems of vehicles using magneto-rheological (MR) fluid dampers. A full car model is used to design and evaluate the performance of the proposed semi-active controlled suspension system. Four mixed mode MR dampers are designed, manufactured, and integrated with four independent sliding mode controllers. The siding mode controller is designed to decrease the energy consumption and maintain robustness. In order to overcome the chattering of the sliding mode controllers, a fuzzy logic control strategy is merged into the sliding mode controller. The proposed fuzzy-sliding mode controller is designed and fabricated. The performance of the semi-active suspensions is evaluated in both the time and frequency domains. The obtained results demonstrate that the proposed fuzzy-sliding mode controller can effectively suppress the vibration of vehicles and improve their ride comfort and handling stability. Furthermore, it is shown that the "chattering" of the sliding mode controller is smoothed when it is integrated with a fuzzy logic control strategy. Although the cost function of the fuzzy-sliding mode control is a slightly higher than that of a classical LQR controller, the control effectiveness and robustness are enhanced considerably.

Performance Improvement of an Energy Efficient Cluster Management Based on Autonomous Learning (자율학습기반의 에너지 효율적인 클러스터 관리에서의 성능 개선)

  • Cho, Sungchul;Chung, Kyusik
    • KIPS Transactions on Computer and Communication Systems
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    • v.4 no.11
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    • pp.369-382
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    • 2015
  • Energy aware server clusters aim to reduce power consumption at maximum while keeping QoS(quality of service) compared to energy non-aware server clusters. They adjust the power mode of each server in a fixed or variable time interval to activate only the minimum number of servers needed to handle current user requests. Previous studies on energy aware server cluster put efforts to reduce power consumption or heat dissipation, but they do not consider energy efficiency well. In this paper, we propose an energy efficient cluster management method to improve not only performance per watt but also QoS of the existing server power mode control method based on autonomous learning. Our proposed method is to adjust server power mode based on a hybrid approach of autonomous learning method with multi level thresholds and power consumption prediction method. Autonomous learning method with multi level thresholds is applied under normal load situation whereas power consumption prediction method is applied under abnormal load situation. The decision on whether current load is normal or abnormal depends on the ratio of the number of current user requests over the average number of user requests during recent past few minutes. Also, a dynamic shutdown method is additionally applied to shorten the time delay to make servers off. We performed experiments with a cluster of 16 servers using three different kinds of load patterns. The multi-threshold based learning method with prediction and dynamic shutdown shows the best result in terms of normalized QoS and performance per watt (valid responses). For banking load pattern, real load pattern, and virtual load pattern, the numbers of good response per watt in the proposed method increase by 1.66%, 2.9% and 3.84%, respectively, whereas QoS in the proposed method increase by 0.45%, 1.33% and 8.82%, respectively, compared to those in the existing autonomous learning method with single level threshold.

A Study on TPS based on ATO for Driverless LRT (ATO 자동운전 기반의 무인운전 경전철 TPS에 관한 연구)

  • Lee, Chang-Hyung;Lee, Jong-Woo
    • Proceedings of the KSR Conference
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    • 2008.11b
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    • pp.1132-1137
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    • 2008
  • Automatic Operation based on ATO (Automatic Train Operation) is necessary for driverless Light Rail Transit business. When this kind of driverless LRT operation plan is made, TPS (Train Performance Simulation) is traditionally simulated at all-out mode and coasting mode based on manual operation. Commercial schedule speed equals to all-out speed minus $9{\sim}15%$ make-up margin. Coasting mode TPS simulation is also run at commercial schedule speed to calculate run time and energy consumption. But TPS based on manual operation should make an improvement on accuracy in case of driverless LRT operation Plan. In this paper, new fast mode TPS simulation using ATO pattern is proposed and show near actual ATO result. The actual ATO pattern can be accurately simulated with the introduction of 4 parameters such as commercial braking rate, jerk, station stop profile and grade converted distance. Normal mode TPS simulation for commercial schedule speed can be designed to have fast mode trip time plus 3 seconds/km margin recommended by korean standard LRT specification.

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A Development of Test Method on the Energy Consumption Efficiency of Domestic Gas Boiler below 70 kW (70 kW 이하 가정용 가스보일러 에너지소비효율 실험방법 개발)

  • Park, Chanil;Kim, Laehyun
    • Journal of Energy Engineering
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    • v.25 no.3
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    • pp.73-82
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    • 2016
  • The energy consumption efficiency in a variety of operational test mode was considered for domestic gas boiler below 70 kW. The energy efficiency test carried out in the experimental conditions similar to the actual operation status was analyzed and compared with the current Korean efficiency test method. Four types of test modes for each boiler(Non-condensing and condensing boiler) were carried out in the condition of laboratory mode(full load, steady state) and actual operating mode. Futhermore divided into two operational status for each of these, it was applied by maximum gas consumption and consumer sales conditions. Test equipment has the function referred to gas boiler standards, such as KS or European standard EN. The equipment should be continuously measured and record the measuring factors which are the flow volume of gas and water, laboratory temperature, water flow volume for heating, return water volume after heating and quantity of the exhaust gases(CO, NO, $NO_2$). The experimental results were found that non-condensing boiler efficiency of laboratory mode is about 10% higher than that of actual mode. In case of condensing boiler, the efficiency of laboratory condition is about 20% higher than that of the actual using conditions. I suggest that the government will gradually take the efficiency test method considering the actual conditions.

Development of a Fuel-Efficient Driving Method based on Slope and Length of Uphill Freeway Section (고속도로 오르막 구간의 경사도와 길이에 따른 연료 효율적 주행방법 개발)

  • Choi, Ji-Eun;Bae, Sang-Hoon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.14 no.1
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    • pp.77-84
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    • 2015
  • In 2011, greenhouse gas emissions of transport sector were 85.04 million $tonCO_2eq$ and road emissions accounted for 95% of total emissions in the transport sector. There are few innovative technologies to reduce greenhouse gas emissions aside from eco-driving education and public relation program. Therefore, this paper focused on analyzing optimal acceleration by certain road grades and suggested fuel-efficient driving method for various uphill sections. Scenarios were established by driving modes. Speed profiles were generated by scenarios and speed variations. Each speed profile applied to Comprehensive Modal Emission Model and then each fuel consumption was estimated. Driving mode and speed variation that minimized fuel consumption were driven according to grade percent and uphill distance. When driving in the eco-friendly mode of the driving and speed variation, reduction rate of fuel consumption was evaluated by comparison between eco-driving and cruise control mode. When a vehicle drove under eco-driving mode at 100kph, 90kph and 80kph on uphill road, fuel consumptions were reduced by 33.9%, 30.8% and 5.3%, respectively.

Design of a Low-Power MOS Current-Mode Logic Circuit (저 전력 MOS 전류모드 논리회로 설계)

  • Kim, Jeong-Beom
    • The KIPS Transactions:PartA
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    • v.17A no.3
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    • pp.121-126
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    • 2010
  • This paper proposes a low-power MOS current-mode logic circuit with the low voltage swing technology and the high-threshold sleep-transistor. The sleep-transistor is used to high-threshold voltage PMOS transistor to minimize the leakage current. The $16{\times}16$ bit parallel multiplier is designed by the proposed circuit structure. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/104. The proposed circuit is achieved to reduce the power consumption by 11.7% and the power-delay-product by 15.1% compared with the conventional MOS current-model logic circuit in the normal mode. This circuit is designed with Samsung $0.18\;{\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

A New Architecture of CMOS Current-Mode Analog-to-Digital Converter Using a 1.5-Bit Bit Cell (1.5-비트 비트 셀을 이용한 새로운 구조의 CMOS 전류모드 아날로그-디지털 변환기)

  • 최경진;이해길;나유찬;신홍규
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.2
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    • pp.53-60
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    • 1999
  • In this paper, it is proposed to a new architecture of CMOS IADC(Current-Mode Analog-to-Digital Converter) using 1.5-bit bit cell of which consists a CSH(Current-Mode Sample-and-Hold) and CCMP(Current-Mode Comparator). In order to guarantee the entire linearity of IADC, the CSH is designed to cancel CFT(Clock Feedthrough) whose resolution is to meet at the least 9-bit which is placed in the front-end of each bit cell. In the proposed IADC, digital correction logic is simplified and power consumption is reduced because bit cell of each stage needs two latch CCMP. Also, it is available for a mixed-mode integrated circuit because all of block is designed with only MOS transistor. With the HYUNDAI 0.8㎛ CMOS parameter, the HSPICE simulation results show that the proposed IADC can be operated at 20Ms/s with SNR of 43 dB with which is satisfied 7-bit resolution for input signal at 100 ㎑, and its power consumption is 27㎽.

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Design of a 64×64-Bit Modified Booth Multiplier Using Current-Mode CMOS Quarternary Logic Circuits (전류모드 CMOS 4치 논리회로를 이용한 64×64-비트 변형된 Booth 곱셈기 설계)

  • Kim, Jeong-Beom
    • The KIPS Transactions:PartA
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    • v.14A no.4
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    • pp.203-208
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    • 2007
  • This paper proposes a $64{\times}64$ Modified Booth multiplier using CMOS multi-valued logic circuits. The multiplier based on the radix-4 algorithm is designed with current mode CMOS quaternary logic circuits. Designed multiplier is reduced the transistor count by 64.4% compared with the voltage mode binary multiplier. The multiplier is designed with Samsung $0.35{\mu}m$ standard CMOS process at a 3.3V supply voltage and unit current $5{\mu}m$. The validity and effectiveness are verified through the HSPICE simulation. The voltage mode binary multiplier is achieved the occupied area of $7.5{\times}9.4mm^2$, the maximum propagation delay time of 9.8ns and the average power consumption of 45.2mW. This multiplier is achieved the maximum propagation delay time of 11.9ns and the average power consumption of 49.7mW. The designed multiplier is reduced the occupied area by 42.5% compared with the voltage mode binary multiplier.