• Title/Summary/Keyword: Constructive algorithm

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A Study on the Geometric Constraint Solving with Graph Analysis and Reduction (그래프의 분석과 병합을 이용한 기하학적제약조건 해결에 관한 연구)

  • 권오환;이규열;이재열
    • Korean Journal of Computational Design and Engineering
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    • v.6 no.2
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    • pp.78-88
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    • 2001
  • In order to adopt feature-based parametric modeling, CAD/CAM applications must have a geometric constraint solver that can handle a large set of geometric configurations efficiently and robustly. In this paper, we describe a graph constructive approach to solving geometric constraint problems. Usually, a graph constructive approach is efficient, however it has its limitation in scope; it cannot handle ruler-and-compass non-constructible configurations and under-constrained problems. To overcome these limitations. we propose an algorithm that isolates ruler-and-compass non-constructible configurations from ruler-and-compass constructible configurations and applies numerical calculation methods to solve them separately. This separation can maximize the efficiency and robustness of a geometric constraint solver. Moreover, the solver can handle under-constrained problems by classifying under-constrained subgraphs to simplified cases by applying classification rules. Then, it decides the calculating sequence of geometric entities in each classified case and calculates geometric entities by adding appropriate assumptions or constraints. By extending the clustering types and defining several rules, the proposed approach can overcome limitations of previous graph constructive approaches which makes it possible to develop an efficient and robust geometric constraint solver.

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Preliminary programming for librarization of Haptic Primitives based on constructive solid geometry and god-object

  • Jin, Do-Hyung;Kyung, Ki-Uk;Kwon, Dong-Soo
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.1093-1097
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    • 2004
  • We propose 'the haptic primitive' for haptic rendering without the need to solve complicated parametric equations. To develop 'the haptic primitive', we adopted "the God-Object Method" as a haptic rendering algorithm and applied 'Constructive Solid Geometry' to manage haptic objects. Besides being used in the 'ghost library' of $PHANToMTM^{TM}$ our method can be used as a basic component for developing tools and libraries that aim to simplify haptic modeling. It can also be applied to tactile display modules and temporal display modules. Ultimately it can be developed into a one-stop haptic modeling tool that enables the user to more conveniently create a tangible CAD systems or a tangible e-ommerce system.

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The Design and Implementation of Implicit Object Classes for Geometric Modeling System (형상 모델링을 위한 음함수 객체의 설계 및 구현)

  • Park, Sang-Kun;Chung, Seong-Youb
    • Korean Journal of Computational Design and Engineering
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    • v.13 no.3
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    • pp.187-199
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    • 2008
  • This paper describes a C++ class hierarchy of implicit objects for geometry modeling and processing. This class structure provides a software kernel for integrating many various models and methods found in current implicit modeling areas. The software kernel includes primitive objects playing a role of unit element in creating a complex shape, and operator objects used to construct more complex shape of implicit object formed with the primitive objects and other operators. In this paper, class descriptions of these objects are provided to better understand the details of the algorithm or implementation, and its instance examples to show the capabilities of the object classes for constructive shape geometry. In addition, solid modeling system shown as an application example demonstrates that the proposed implicit object classes allow us to carry out modern solid modeling techniques, which means they have the capabilities to extend to various applications.

An Iterative Insertion Algorithm and a Hybrid Meta Heuristic for the Traveling Salesman Problem with Time Windows (시간제약이 있는 외판원 문제를 위한 메타휴리스틱 기법)

  • Kim, Byung-In
    • Journal of Korean Institute of Industrial Engineers
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    • v.33 no.1
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    • pp.86-98
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    • 2007
  • This paper presents a heuristic algorithm for the traveling salesman problem with time windows (TSPTW). Aniterative insertion algorithm as a constructive search heuristic and a hybrid meta heuristic combining simulatedannealing and tabu search with the randomized selection of 2-interchange and a simple move operator as animproving search heuristic are proposed, Computational tests performed on 400 benchmark problem instancesshow that the proposed algorithm generates optimal or near-optimal solutions in most cases. New best knownheuristic values for many benchmark problem sets were obtained using the proposed approach.

Machine Layout Decision Algorithm for Cellular Formation Problem

  • Lee, Sang-Un
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.4
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    • pp.47-54
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    • 2016
  • Cellular formation and layout problem has been known as a NP-hard problem. Because of the algorithm that can be solved exact solution within polynomial time has been unknown yet. This paper suggests a systematic method to be obtain of 2-degree partial directed path from the frequency of consecutive forward order. We apply the modified Kruskal algorithm of minimum spanning tree to be obtain the partial directed path. the proposed reverse constructive algorithm can be solved for this problem with O(mn) time complexity. This algorithm performs same as best known result of heuristic and metaheuristic methods for 4 experimental data.

Efficient Technology Mapping of FPGA Circuits Using Fuzzy Logic Technique (퍼지이론을 이용한 FPGA회로의 효율적인 테크놀로지 매핑)

  • Lee, Jun-Yong;Park, Do-Soon
    • The Transactions of the Korea Information Processing Society
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    • v.7 no.8
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    • pp.2528-2535
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    • 2000
  • Technology mapping is a part of VLSI CAD system, where circuits in logical level are mapped into circuits in physical level. The performance of technology mapping system is evaluatecJ by the delay and area of the resulting circuits. In the sequential circuits, the delay of the circuit is decided by the maximal delay between registers. In this work, we introduce an FPGA mapping algorithm improved by retiming technique used in constructive level and iterative level, and by fuzzy logic technique. Initial circuit is mapped into an FPGA circuit by constructive manner and improved by iterative retiming. Criteria given to the initial circuit are structured hierarchically by decision-making functions of fuzzy logic. The proposed system shows better results than previous systems by the experiments with MCNC benchmarkers.

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A One-Pass Standard Cell Placement Algorithm Using Multi-Stage Graph Model (다단 그래프 모델을 이용한 빠른 표준셀 배치 알고리즘)

  • 조환규;경종민
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.6
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    • pp.1074-1079
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    • 1987
  • We present a fast, constructive algorithm for the automatic placement of standard cells, which consists of two steps. The first step is responsible for cell-row assignment of each cell, and converts the circuit connectivity into a multi-stage graph under to constraint that sum of the cell-widths in each stage of the multi-state graph does not exceed maximum cell-row width. Generatin of feed-through cells in the final layout was shown to be drastically reduced by this step. In the second step, the position of each cell within the row is determined one by one from left to right so that the cost function such as the local channel density is minimized. Our experimental result shows that this algorithm yields near optimal results in terms of the number of feed-through cells and the horizontal tracks, while running about 100 times faster than other iterative procedures such as pairwise interchange and generalized force directed relaxation method.

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General Log-Likelihood Ratio Expression and Its Implementation Algorithm for Gray-Coded QAM Signals

  • Kim, Ki-Seol;Hyun, Kwang-Min;Yu, Chang-Wahn;Park, Youn-Ok;Yoon, Dong-Weon;Park, Sang-Kyu
    • ETRI Journal
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    • v.28 no.3
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    • pp.291-300
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    • 2006
  • A simple and general bit log-likelihood ratio (LLR) expression is provided for Gray-coded rectangular quadrature amplitude modulation (R-QAM) signals. The characteristics of Gray code mapping such as symmetries and repeated formats of the bit assignment in a symbol among bit groups are applied effectively for the simplification of the LLR expression. In order to reduce the complexity of the max-log-MAP algorithm for LLR calculation, we replace the mathematical max or min function of the conventional LLR expression with simple arithmetic functions. In addition, we propose an implementation algorithm of this expression. Because the proposed expression is very simple and constructive with some parameters reflecting the characteristic of the Gray code mapping result, it can easily be implemented, providing an efficient symbol de-mapping structure for various wireless applications.

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Stability Analysis of Large Scale Dynamical Systems Using Computer Generated Lyapunov Functions (컴퓨터 발생 Lyapunov 함수에 의한 대규모 시스템의 안정도 해석)

  • Nam, Boo-Hee
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.1
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    • pp.46-51
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    • 1987
  • Using the computer-generated Lyapunov functions due to Brayton-tong's constructive algorithm, we estimate the domains of attraction of dynamical systems of the second order, and analyze the asymptotic stability of large scale contincous-time and discrete-time systems by the decomposition and aggregation method. With this approach we get the less conservative stability results than the existing methods.

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Stability Analysis of One-Multiplier Lattice Digital Filter Using a Constructive Algorithm (단일계수(單一係數) 격자형(格子型) 디지탈 필터의 안정도(安定度) 해석(解析))

  • Nam, Boo Hee
    • Journal of Industrial Technology
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    • v.5
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    • pp.27-36
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    • 1985
  • 마이크로 컴퓨터로 실현(實現)되는 디지탈 필터는 유한어장효과(有限語張效果)에 기인(基因)한 양자화(量子化)(quantization)와 잉여현상(overflow) 때문에, 이상적(理想的)인 선형(線型)필터도 비선형(非線型) 특성(特性)을 나타내어 Limit Cycle과 같은 오차의 원인이 된다. 본(本) 논문(論文)에서는 수학행렬(行列)의 안정(安定)성질을 이용한 Norm-Lyapunov 함수를 이용하여, 디지탈 필터의 안정도를 해석하였다. 잉여현상이 없는 경우에는 Jury-Lee 판별법을 적용하여 전자(前者)와 비교하였다.

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