• 제목/요약/키워드: Constant power area

검색결과 151건 처리시간 0.027초

전력전자 변환장치를 위한 고정 스위칭 주파수로 동작하는 3상 및 2상 변조 SRP-PWM기법 (3-Phase and 2-Phase Modulated SRP-PWM Technique with a Fixed Frequency for Power Electronics Converters)

  • 오승열;정영국;임영철;위석오
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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    • pp.397-401
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    • 2004
  • In this paper, Inverter drives adopting 3-phase and 2-phase SRP-PWM (Separately Randomized Pulse Position PWM) with fixed switching frequency is proposed. In the proposed SRP-PWM scheme, each of 3 or 2 phase pulses Is located randomly in each switching interval. The experimental results show that the voltage / current harmonics and the switching noise harmonics are spread to a wide band area. Also, the performance of the 3-phase SRP-PWM and the 2-phase SRP-PWM are compared to each other. In result, the speed response is nearly similar to each other from the viewpoint of the v/f constant control.

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자동진폭조절 기능을 갖는 CMOS IF VCO 설계 (Design of a CMOS W VCO with Automatic Amplitude Control)

  • 김유환;문요섭;이종렬;박종태;유종근
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.145-148
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    • 2002
  • In this paper, a voltage controlled oscillator (VCO) with automatic amplitude control is designed using a 0.35${\mu}{\textrm}{m}$ CMOS process. A cross-coupled PMOS pair is used for a negative resistance to compensate for the losses in the LC resonator, and an automatic\ulcorner amplitude control function is adapted to provide constant output power independent of the Q-factor of the LC resonator. The designed VCO operates in the 200MHz to 550MHz frequency range using different external resonators. The simulated phase noise is -128 dBc/Hz at 100KHz offset from the carrier frequency of 260MHz. It dissipates 0.㎽ from a 3V power supply. The area is 300${\mu}{\textrm}{m}$ x1201${\mu}{\textrm}{m}$.

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비디오 시스템을 위한 저전압, 디지털 자동이득 조절기 (A Low Voltage, Digital Automatic Gain Controller)

  • 권진호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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    • pp.183-186
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    • 2000
  • In this paper we propose a new architecture of a programmable digital automatic gain controller(AGC) for analog interface in mixed mode systems. Compared with conventional analog AGCs which have difficulties in integration due to large capacitors, the proposed AGC is easily integrated. So the production cost can be reduced. In addition, The proposed AGC has a better performance in temperature, and power supply variations, and substrate noise than analog counterparts do. To prevent erroneous operations of the AGC due to noise, a mal-function preventer is newly proposed. In addition, to achieve an optimized AGC time constant, we propose a logic block which controls an up-down counting clock. This is directly related to the changing speed of the AGC gain. Implemented with a 0.25 $\mu\textrm{m}$ 1-poly, 5-metal CMOS parameters, the AGC operates from a single 2.5V power supply with the dynamic range of 36.ldB and occupies active area of 500$\mu\textrm{m}$${\times}$600$\mu\textrm{m}$

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A New Efficient Mppt Control Algorithm for Low Insolation Intensity

  • Yu, Gwon-Jong;Jung, Young-Seok;Park, Ju-Yeop
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • 제2B권4호
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    • pp.214-218
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    • 2002
  • In this paper, the effectiveness of three different control algorithms are thoroughly investigated via simulation and a proposed efficiency evaluation method of experimentation. Both the steady state and transient characteristics of each control algorithm along with its measured efficiency are analyzed. Finally, a novel two-mode maximum power point tracking (MPPT) control algorithm combining the constant voltage control and the incremental conduction (IncCond) methods is proposed to improve the efficiency of the 3KW PV power generation system at different insolation conditions. Experimental results show that the proposed two-mode MPPT control provides excellent performance at less than 30% insolation intensity, covering the whole insolation area without additional hardware circuitry.

다항 위험함수에 근거한 NHPP 소프트웨어 신뢰성장모형에 관한 연구 (A Study for NHPP software Reliability Growth Model based on polynomial hazard function)

  • 김희철
    • 디지털산업정보학회논문지
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    • 제7권4호
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    • pp.7-14
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    • 2011
  • Infinite failure NHPP models presented in the literature exhibit either constant, monotonic increasing or monotonic decreasing failure occurrence rate per fault (hazard function). This infinite non-homogeneous Poisson process is model which reflects the possibility of introducing new faults when correcting or modifying the software. In this paper, polynomial hazard function have been proposed, which can efficiency application for software reliability. Algorithm for estimating the parameters used to maximum likelihood estimator and bisection method. Model selection based on mean square error and the coefficient of determination for the sake of efficient model were employed. In numerical example, log power time model of the existing model in this area and the polynomial hazard function model were compared using failure interval time. Because polynomial hazard function model is more efficient in terms of reliability, polynomial hazard function model as an alternative to the existing model also were able to confirm that can use in this area.

Nested-chopping 기법을 이용한 Instrumentation Amplifier 설계 (A Design of Instrumentation Amplifier using a Nested-Chopping Technique)

  • 이준규;범진욱;임신일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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    • pp.483-484
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    • 2007
  • In this paper, we describe a chip design technique for instrumentation amplifier using a nested-chopping technique. Conventional chopping technique uses a pair of chopper, but nested chopping technique uses two pairs of chopper to reduce residual offset and 1/f noise. The inner chopper pair removes the 1/f noise, while the outer chopper pair reduces the residual offset. Our instrumentation amplifier using a nested chopping technique has residual offset under 100 nV. We also implement very low frequency filter. Since this filter needs very large RC time constant, we use a technique named 'diode connected PMOS' to increase R with small die area. The total power consumption is 3.1 mW at the supply voltage of 3.3V with the 0.35um general CMOS technology. The die area of implemented chip was $530um{\times}300um$.

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Boussinesq 모델을 이용한 제주 차귀도 해역의 다방향 불규칙파 시뮬레이션 (A Simulation of Directional Irregular Waves at Chagui-Do Sea Area in Jeju Using the Boussinesq Wave Model)

  • 류황진;신승호;홍기용;홍석원;김도영
    • 한국해양공학회지
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    • 제21권1호
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    • pp.7-17
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    • 2007
  • Based on the Boussinesq wave model, the wave distribution in the Chagui-Do sea area in Jeju was simulated by applying the directional irregular waves at an incident boundary. The time and spatial variations of monthly mean wave height and period were investigated, which aims to provide basic information on optimal sites for wave power generation. The grid size and time interval of the Boussinesq wave model were validated by examining wave distributions around a surface piercing wall, fixed at sea bottom with a constant slope. Except for the summer season, the significant wave height is dominated by wind waves and appears to be relatively high at the north sea of Chagui-Do, which is open to the ocean, while it is remarkably reduced at the rear sea of Chagui-Do because of its blocking effect on incident waves. In the summer, the significant wave height is higher at the south sea, and it is dominated by the swell waves, which is contributed by the strong south-west wind. The magnitude of significant wave height is the largest in the winter and the lowest in the spring. Annual average of the significant wave height is distinctively high at the west sea close to the Chagui-Do coast, due to a steep variation of water depth and corresponding wave focusing effect. The seasonal and spatial distribution of the wave period around Chagui-Do sea reveals very similar characteristics to the significant wave height. It is suggested that the west sea close to the Chagui-Do coast is the mast promising site for wave power generation.

농용 무인헬리콥터의 원심클러치 설계 - 동력 전달의 이론분석 - (Centrifugal Clutch Design for an Unmanned Helicopter - Theoretical Analysis of Power Transfer -)

  • 이재홍;구영모;신시균
    • Journal of Biosystems Engineering
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    • 제33권1호
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    • pp.14-20
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    • 2008
  • An agricultural unmanned helicopter was suggested for an alternative to current pesticide application methods to solve such problems as high cost, low efficiency, shirking task and unsafe work. To pursuit this trend, researches on the development of unmanned helicopters have been accelerated in Korea as well. In this research, a guide type centrifugal clutch that plays an important role in the unmanned helicopter was studied. Theoretical analyses and experimental tests were conducted for designing an optimal clutches. Main design factors of the guide type centrifugal clutch were found to be spring constant, free length of spring, mass of friction sector, contact area, allowable pressure, number of friction sector, friction coefficient, radius of drum, and clutch arrangement. And these design factors could be the functions of engaging engine speed and desired power transfer capacity. The result of the single clutch test showed the power transfer capacity of 14.1 PS at 5,800 rpm and the result of the dual clutch test showed that the capacity of 17.7 PS at 5,600 rpm. These experimental results agreed well the theoretical simulations.

남해 서부 연안해역의 난류 확산 특성 (Characteristics of Eddy Diffusion in the Southwest Coastal Zone of Korea)

  • 최양호;이미진;이명선
    • 한국환경과학회지
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    • 제33권8호
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    • pp.583-589
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    • 2024
  • Seawater movement analyses and dye diffusion experiments were conducted to understand the characteristics of eddy diffusion in the southwest coastal zone of Korea. The findings indicate that pollutants entering the study area were most influenced by tidal currents and showed temporal and spatial variations according to the turbulent characteristics of the tidal current. Pollutants entering the study area are likely to travel a distance of approximately 2 km (within 1 h) following the direction of the tidal currents and show a spreading distance (diameter of the diffusion area) of within 10% of the travel distance (within 200 m). The dispersion of the diffusion area is expected to increase in proportion to the elapsed time raised to a power of 1.19 to 1.23. The results are expected to provide a basis for using the eddy diffusion coefficient as a temporally variable value (previously assumed to be a constant based on empirical data), thereby contributing to improving the predictive accuracy of ocean diffusion models.

A 1.8 V 40-MS/sec 10-bit 0.18-㎛ CMOS Pipelined ADC using a Bootstrapped Switch with Constant Resistance

  • Eo, Ji-Hun;Kim, Sang-Hun;Kim, Mun-Gyu;Jang, Young-Chan
    • Journal of information and communication convergence engineering
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    • 제10권1호
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    • pp.85-90
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    • 2012
  • A 40-MS/sec 10-bit pipelined analog to digital converter (ADC) with a 1.2 Vpp differential input signal is proposed. The implemented pipelined ADC consists of eight stages of 1.5 bit/stage, one stage of 2 bit/stage, a digital error correction block, band-gap reference circuit & reference driver, and clock generator. The 1.5 bit/stage consists of a sub-ADC, digital to analog (DAC), and gain stage, and the 2.0 bit/stage consists of only a 2-bit sub-ADC. A bootstrapped switch with a constant resistance is proposed to improve the linearity of the input switch. It reduces the maximum VGS variation of the conventional bootstrapped switch by 67%. The proposed bootstrapped switch is used in the first 1.5 bit/stage instead of a sample-hold amplifier (SHA). This results in the reduction of the hardware and power consumption. It also increases the input bandwidth and dynamic performance. A reference voltage for the ADC is driven by using an on-chip reference driver without an external reference. A digital error correction with a redundancy is also used to compensate for analog noise such as an input offset voltage of a comparator and a gain error of a gain stage. The proposed pipelined ADC is implemented by using a 0.18-${\mu}m$ 1- poly 5-metal CMOS process with a 1.8 V supply. The total area including a power decoupling capacitor and the power consumption are 0.95 $mm^2$ and 51.5 mW, respectively. The signal-to-noise and distortion ratio (SNDR) is 56.15 dB at the Nyquist frequency, resulting in an effective number of bits (ENOB) of 9.03 bits.