• 제목/요약/키워드: Configuration memory

검색결과 175건 처리시간 0.028초

CFDS 코드의 효율성 개선 (Efficiency Enhancement of CFDS Code)

  • 김재관;이정일;김종암;홍승규;이황섭;안창수
    • 한국전산유체공학회:학술대회논문집
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    • 한국전산유체공학회 2005년도 춘계 학술대회논문집
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    • pp.123-127
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    • 2005
  • The numerical analyses of the complicated flows are widely attempted in these days. Because of the enormous demanding memory and calculation time, parallel processing is used for these problems. In order to obtain calculation efficiency, it is important to choose proper domain decomposition technique and numerical algorithm. In this research we enhanced the efficiency of the CFDS code developed by ADD, using parallel computation and newly developed numerical algorithms. For the huge amount of data transfer between blocks non-blocking method is used, and newly developed data transfer algorithm is used for non-aligned block interface. Recently developed RoeM scheme is adpoted as a spatial difference method, and AF-ADI and LU-SGS methods are used as a time integration method to enhance the convergence of the code. Analyses of the flows around the ONERA M6 wing and the high angle of attack missile configuration are performed to show the efficiency improvement.

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쉐이딩 보정 알고리즘과 CMOS 이미지 센싱 시스템 설계 (Shading Correction Algorithm and CMOS Image Sensing System Design)

  • 김영빈;류광렬
    • 한국정보통신학회:학술대회논문집
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    • 한국정보통신학회 2012년도 추계학술대회
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    • pp.1003-1006
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    • 2012
  • 본 논문은 CMOS 센서의 스캔 이미지 향상 위한 기법으로 흑백의 명암차를 이용한 이미지 보상 알고리즘과 시스템 설계에 관한 연구이다. 제안한 기법은 CMOS 센서의 각 화소에 대해 명암차를 구하고, 제한된 메모리 조건 하에서 쉐이딩 알고리즘을 적용한다. 제안 기법의 성능은 하드웨어를 설계하여 평가 한다. 실험 결과는 테스트 이미지의 에지 부분에서 채널별 밝기 차이가 개선되었고, 균등한 품질의 이미지 센싱이 가능하였다.

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서울2호선 TCMS 무선지상장치 개발 및 시험결과에 대한 고찰 (The Study about TCMS Wireless Depot Analytical Equipment Development and Test Results at SeoulMetro Line2)

  • 김도훈;서상준;한정수;김철호
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2008년도 춘계학술대회 논문집
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    • pp.353-362
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    • 2008
  • Operation data and fault data are recorded at the TCMS(Train Control and Monitoring System) of train are very important record for repairs and inspection of train. there are two ways to transfer the data today. one is using memory card and the other is using wireless communications. This paper is proposed about TCMS wireless depot analytical equipment that transfers data recorded in train to depot equipment via wireless method. The TCMS wireless depot equipment configuration is an AP(Access Point) and a central server PC at depot equipment. This method has the advantage of decrease of personnel expenses, collection time and convenience of staffs. This paper is verified about the utility of use, efficient establishment position of an AP at depot, the safety of data receiving, the exactitude of data and the shortening of transmission time. and this equipment is now operating at shin-jeong depot of SeoulMetro.

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실시간 운영체제 $iRTOS^{TM}$ 상의 KVM 메모리 관리 체계 내에서 효율적인 가비지 콜렉션의 설계 및 구현 (The Design and Implementation of Garbage Collection in KVM Memory Management Facility on Real-Time Operating System, $iRTOS^{TM}$)

  • 최인범;유용선;이철훈
    • 한국정보과학회:학술대회논문집
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    • 한국정보과학회 2004년도 봄 학술발표논문집 Vol.31 No.1 (A)
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    • pp.805-807
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    • 2004
  • 최근 IT 산업의 발전과 더불어, 리소스가 제한된 소형 기기들의 사용이 비약적으로 증가하고 있는 추세이다. 자바는 플랫폼 독립성(Platform Independency), 보안성(Security), 네트워크 이동성(Network Mobility) 등의 장점을 가지고 있어, 이러한 소형 기기들에 자바 환경을 적용하게 되면 여러 가지 이점을 가지게 된다. 임베디드 장치나 모바일 같은 제한된 리소스를 사용하는 기기들에는 SUN 사의 CLDC(Connected, Limited Device Configuration)에서 정의하고 있는 K 가상 머신(K Virtual Machine: KVM)을 탑재하여 사용하게 된다. 본 논문에서는 실시간 운영체제 iRTOS$^{TM}$와 KVM 을 탑재한 소형 기기에서 좀더 효율적으로 KVM 의 메모리를 관리하기 위한 Garbage Collection기법을 설계하고 구현한 내용을 설명한다.

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A Link Layer Design for DisplayPort Interface

  • Jin, Hyun-Bae;Yoon, Kwang-Hee;Kim, Tae-Ho;Jang, Ji-Hoon;Song, Byung-Cheol;Kang, Jin-Ku
    • 전기전자학회논문지
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    • 제14권4호
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    • pp.297-304
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    • 2010
  • This paper presents a link layer design of DisplayPort interface with a state machine based on packet processing. The DisplayPort link layer provides isochronous video/audio transport service, link service, and device service. The merged video, audio main link, and AUX channel controller are implemented with 7,648 LUTs(Loop Up Tables), 6020 register, and 821,760 of block memory bits synthesized using a FPGA board and it operates at 203.32MHz.

Predictability of the f/g time series

  • 조일현;김연한;조경석;박영득
    • 천문학회보
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    • 제36권1호
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    • pp.40.1-40.1
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    • 2011
  • Large solar flares are associated with various aspects of space weather effects. Numerous attempts have been made to predict when the solar flare will be occurred mainly based on the configuration of the magnetic field of its flaring site. We analyze the time series of f/g which indicates a representative measure of the sunspot complexity to see whether it shows a possibility to be predicted without huge amounts of observation. Two kinds of analysis results are presented. One is from its power spectrum giving that there's no significantly persistent periodicity within a few days. Its de-trended fluctuation shows the Hurst exponent larger than 0.5 implying that the f/g time series has a long-term memory in time scales less than 10 days.

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Numerical Analysis of Micro-jet Array Cooling Device with Various Configurations

  • Jung, Yang-Ki;Lee, In-Chan;Ma, Tae-Young
    • Transactions on Electrical and Electronic Materials
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    • 제6권2호
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    • pp.39-45
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    • 2005
  • Numerical and visualization procedures are used in a finite difference grid to analyze and better understand the heat transfer in the MEMS based air micro-jet array (MIA) impingement cooling device. The Navier-Stokes (NS) equations with incompressible flow are solved using an implicit procedure. The temperature contour and velocity vector visualization diagrams are used for illustration. The computed temperature distribution at the bottom of the MIA is in good agreement with the experimental measurement data. The parameters are investigated to improve the efficiency of heat transfer in the MIA. The optimum configuration of the MIA is suggested. The present modeling explains the flow phenomenon and yields valuable information to understand the flow and heat transfer in MIA.

Efficient Implementation of the MQTT Protocol for Embedded Systems

  • Deschambault, Olivier;Gherbi, Abdelouahed;Legare, Christian
    • Journal of Information Processing Systems
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    • 제13권1호
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    • pp.26-39
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    • 2017
  • The need for embedded devices to be able to exchange information with each other and with data centers is essential for the advent of the Internet of Things (IoT). Several existing communication protocols are designed for small devices including the message-queue telemetry transport (MQTT) protocol or the constrained application protocol (CoAP). However, most of the existing implementations are convenient for computers or smart phones but do not consider the strict constraints and limitations with regard resource usage, portability and configuration. In this paper, we report on an industrial research and development project which focuses on the design, implementation, testing and deployment of a MQTT module. The goal of this project is to develop this module for platforms having minimal RAM, flash code memory and processing power. This software module should be fully compliant with the MQTT protocol specification, portable, and inter-operable with other software stacks. In this paper, we present our approach based on abstraction layers to the design of the MQTT module and we discuss the compliance of the implementation with the requirements set including the MISRA static analysis requirements.

Preparation of the SBT Film on the LZO/Si Structure for FRAM Application

  • Im, Jong-Hyun;Jeon, Ho-Seung;Kim, Joo-Nam;Park, Byung-Eun;Kim, Chul-Ju
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.140-141
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    • 2007
  • To fabricate the metal-ferroelectric-insulator-semiconductor (MFIS) structure for the ferroelectric random access memory (FRAM) application, we prepared the ferroelectric $Sr_{0.9}Bi_{2.1}Ta_2O_9$ (SBT) and the insulator LaZrOx (LZO) thin films on the silicon substrate using a sol-gel method. In this study, we will investigate the feasibility of the SBT/LZO/Si structure as one of the promising gate configuration for the 1-transistor (1-T) type FRAM, by measurements of the electrical properties and the physical properties.

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SPICE 시뮬레이션을 위한 공진형 인버터 모델링 연구 (Resonant Inverter Modeling for SPICE Simulation)

  • 한수빈;정봉만;신동열;최수현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1993년도 하계학술대회 논문집 B
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    • pp.715-717
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    • 1993
  • Resonant Inverter is analyzed by means of widely available software such a SPICE. In this paper, macro-model of RDCLI is used which is based on converter switch function rather than actual circuit configuration. Computer memory and nm time are greatly reduced compared to micro-model by using macro-model. System overall performance including control strategy and harmonic characteristics can be analyzed easily. This method is suited for stead state analysis and transition analysis at system level.

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