• Title/Summary/Keyword: Computing time-delay

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Transmission Control Scheme for Low Power Stations in IEEE 802.11b Wireless LAN (IEEE 802.11b 무선 랜에서 저 전력 스테이션을 위한 전송 제어 기법)

  • Song, Myong-Lyol
    • Journal of Internet Computing and Services
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    • v.9 no.2
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    • pp.43-50
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    • 2008
  • In IEEE 802.11b wireless LAN, stations keep synchronization by receiving beacons being periodically sent by the AP (access point) when they run in low power mode. Beacon transmission is delayed if wireless channel is busy at a scheduled TBTT (target beacon transmission time), and stations must be awake until they receive the delayed beacon. In this paper, we propose a scheme that stations get their transmission delayed if they have little time for successful data transmission by the next TBTT. Beacon transmission without delay is guaranteed at every TBTT with this method so that the awake time of low power stations to receive beacon can be reduced. The proposed method is simulated and its characteristics ore described with the analysis of the results. The measured results in terms of beacon delay show some enhancement in energy consumption.

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Influence of fluidelastic vibration frequency on predicting damping controlled instability using a quasi-steady model in a normal triangular tube array

  • Petr Eret
    • Nuclear Engineering and Technology
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    • v.56 no.4
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    • pp.1454-1459
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    • 2024
  • Researchers have applied theoretical and CFD models for years to analyze the fluidelastic instability (FEI) of tube arrays in steam generators and other heat exchangers. The accuracy of each approach has typically been evaluated using the discrepancy between the experimental critical flow velocity and the predicted value. In the best cases, the predicted critical flow velocity was within an order of magnitude comparable to the measured one. This paper revisits the quasi-steady approach for damping controlled FEI in a normal triangular array with a pitch ratio of P/d = 1.375. The method addresses the fluidelastic frequency at the stability threshold as an input parameter for the approach. The excellent agreement between the estimated stability thresholds and the equivalent experimental results suggests that the fluidelastic frequency must be included in the quasi-steady analysis, which requires minimal computing time and experimental data. In addition, the model allows a simple time delay analysis regarding flow convective and viscous effects.

Delayless MDCT for Scalable Speech Codec (계층구조 음성 부호화기를 위한 지연 없는 MDCT 구조)

  • Sung, Ho-Sang;Park, Ho-Chong
    • The Journal of the Acoustical Society of Korea
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    • v.26 no.3
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    • pp.102-108
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    • 2007
  • A high-Performance scalable speech codec generally requires a very low-rate first layer and a fine granule second layer, and this codec can be implemented with the harmonic codec and the MDCT-based transform codec for each layer. In this structure, however. each codec requires independent frequency transform and the time delay of each codec is accumulated. resulting in long time delay for the overall codec. In this paper, new MDCT structure in the second layer is Proposed. where MDCT is forced to share the look-ahead region of the first layer in order to prevent the time delay accumulation and the resulting functional error of MDCT is analyzed and removed after IMDCT The Proposed delayless MDCT requires no additional bits and Provides the equivalent coding performance with the reduced time delay, yielding a meaningful enhancement of the overall codec.

Data Central Network Technology Trend Analysis using SDN/NFV/Edge-Computing (SDN, NFV, Edge-Computing을 이용한 데이터 중심 네트워크 기술 동향 분석)

  • Kim, Ki-Hyeon;Choi, Mi-Jung
    • KNOM Review
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    • v.22 no.3
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    • pp.1-12
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    • 2019
  • Recently, researching using big data and AI has emerged as a major issue in the ICT field. But, the size of big data for research is growing exponentially. In addition, users of data transmission of existing network method suggest that the problem the time taken to send and receive big data is slower than the time to copy and send the hard disk. Accordingly, researchers require dynamic and flexible network technology that can transmit data at high speed and accommodate various network structures. SDN/NFV technologies can be programming a network to provide a network suitable for the needs of users. It can easily solve the network's flexibility and security problems. Also, the problem with performing AI is that centralized data processing cannot guarantee real-time, and network delay occur when traffic increases. In order to solve this problem, the edge-computing technology, should be used which has moved away from the centralized method. In this paper, we investigate the concept and research trend of SDN, NFV, and edge-computing technologies, and analyze the trends of data central network technologies used by combining these three technologies.

A Neural Network Aided Kalman Filtering Approach for SINS/RDSS Integrated Navigation

  • Xiao-Feng, He;Xiao-Ping, Hu;Liang-Qing, Lu;Kang-Hua, Tang
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.1
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    • pp.491-494
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    • 2006
  • Kalman filtering (KF) is hard to be applied to the SINS (Strap-down Inertial Navigation System)/RDSS (Radio Determination Satellite Service) integrated navigation system directly because the time delay of RDSS positioning in active mode is random. BP (Back-Propagation) Neuron computing as a powerful technology of Artificial Neural Network (ANN), is appropriate to solve nonlinear problems such as the random time delay of RDSS without prior knowledge about the mathematical process involved. The new algorithm betakes a BP neural network (BPNN) and velocity feedback to aid KF in order to overcome the time delay of RDSS positioning. Once the BP neural network was trained and converged, the new approach will work well for SINS/RDSS integrated navigation. Dynamic vehicle experiments were performed to evaluate the performance of the system. The experiment results demonstrate that the horizontal positioning accuracy of the new approach is 40.62 m (1 ${\sigma}$), which is better than velocity-feedback-based KF. The experimental results also show that the horizontal positioning error of the navigation system is almost linear to the positioning interval of RDSS within 5 minutes. The approach and its anti-jamming analysis will be helpful to the applications of SINS/RDSS integrated systems.

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An MAC Protocol Design in Minimizing of Data Transmission Delay for Wireless Sensor Networks (센서 네트워크에서 데이타 전송 지연을 최소화하는 MAC 프로토콜의 설계)

  • Kim, Man-Seok;Kim, Sang-Soo;Koh, Kwang-Shin;Cho, Gi-Hwan;Lee, Moon-Ho
    • Journal of Internet Computing and Services
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    • v.8 no.2
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    • pp.43-54
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    • 2007
  • The effective power consumption is the primary issue in a sensor network which consists of the sensor nodes with limited battery power. So, most of the MAC protocols in sensor networks have been designed with the consideration of energy efficiency. Generally, these protocols make use of the listen and sleep mode periodically. However, this approach inevitably causes a long transmission delay on the data forwarding path, which is mainly resulted from the sleep time of the receiver node. This paper deals with a design of DT-MAC(Data Transmission centric MAC) protocol, with minimizes the data transmission delay while it forces each node to consume its energy efficiently. Thus, a node received a packet converts its remained sleep time to the pseudo_listen time, in which the node is able to transmit a packet. With benefit of the pseudo_listen period, the data transmission delay along with the data forwarding path will be shortened as much as it possible. Therefore, DT-MAC protocol is very suitable to the various applications which require a real time sensing data such as disaster and fire alarm.

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Rational approximation of multiple input delay systems (복수입력 시간지연 시스템의 유리근사화)

  • HWANG, I Cheol;PARK, Kyoung Taik
    • Journal of the Korean Society for Precision Engineering
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    • v.14 no.1
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    • pp.194-204
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    • 1997
  • In this paper, we consider the rational approximation of multiple input delay systems. The method of computing Hankel singular values and vectors is firstly introduced, where explicitly shows the structure of the corresponding Hankel singular vectors. Secondly, rational approximants are obtained from output nor- mal relizations, which are constructed by Hankel singular values and vectors. As a result, it is shown that rational approximants by output normal realization preserve intrinsic properties of time delay systems than Pad'e approximants.

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Bayes Rule for MAC State Sojourn Time Supporting Packet Data Service in CDMA Wireless Celluar Networks

  • Park, Cheon-Won;Kim, Dong-Joon;Shin, Woo-Cheol;Ju, Jee-Hwan
    • Proceedings of the IEEK Conference
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    • 2002.07c
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    • pp.1606-1609
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    • 2002
  • MAC state models appeared with an effort to overcome technical demerits of CDMA in provisioning packet data service. In the scenario of sojourn and transition on MAC states, the design of state sojourn time is a critical issue for an efficient utilization of limited recource; a longer sojourn time leads to more resource being preserved for inactive stations, while more connection components should be recovered with a shorter sojourn time. Thus, the sojourn time at each MAC state must be optimized in consideration of these two conflicting arguments. In this paper, we first present a generic MAC state model. Secondly, based on the generic model, we reveal a relation of inactive period and the delay time of the last packet served in pre- ceding active period and specify a loss function reflect-ing two antinomic features that result from a change of state sojourn time. Using the proposed loss function, we construct a decision problem to find an optima3 rule for state sojourn times. Finally, we present a way of computing Bayes rule by use of the posterior distribution of inactivity duration for given observation on the delay time of last packet. Furthermore, Bayes rules are explicitly expressed for special arrival processes and investigated with respect to traffic load and loss parameters.

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Development of Computing Model for the Process and Operation Interval of Reinforced Concrete Work using Web-CYCLONE (철근콘크리트 골조공사의 프로세스 및 공정 공백 산출 시뮬레이션 모형 개발)

  • Park, Sang-Min;Son, Chang-Baek;Lee, Dong-Eun
    • Proceedings of the Korean Institute of Building Construction Conference
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    • 2012.05a
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    • pp.341-343
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    • 2012
  • This study introduces a method for computation of process and operation gap in the specific construction operation(i.e., RC frame construction applying a block-grouping scheme) using CYCLONE-based simulation modeling and analysis technique. Since uncertainty of construction environment exists, a thoughtful production planning is required to effectively deal with a risk resulting in schedule delay in advance. This study presents the concepts of a time delay occurred in a process level and operation level in a operation model, and a method of measuring gap-times in each level while the simulation progresses. It helps a site manager to decide how many segmentation in a construction block is suitable for eliminating unproductive time-delays under the constrained resources (e.g., laborer, equipment). A case study presents a network model representing a three segmented RC frame work, and result obtained from the simulation experiment.

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Approximate Multiplier with High Density, Low Power and High Speed using Efficient Partial Product Reduction (효율적인 부분 곱 감소를 이용한 고집적·저전력·고속 근사 곱셈기)

  • Seo, Ho-Sung;Kim, Dae-Ik
    • The Journal of the Korea institute of electronic communication sciences
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    • v.17 no.4
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    • pp.671-678
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    • 2022
  • Approximate computing is an computational technique that is acceptable degree of inaccurate results of accurate results. Approximate multiplication is one of the approximate computing methods for high-performance and low-power computing. In this paper, we propose a high-density, low-power, and high-speed approximate multiplier using approximate 4-2 compressor and improved full adder. The approximate multiplier with approximate 4-2 compressor consists of three regions of the exact, approximate and constant correction regions, and we compared them by adjusting the size of region by applying an efficient partial product reduction. The proposed approximate multiplier was designed with Verilog HDL and was analyzed for area, power and delay time using Synopsys Design Compiler (DC) on a 25nm CMOS process. As a result of the experiment, the proposed multiplier reduced area by 10.47%, power by 26.11%, and delay time by 13% compared to the conventional approximate multiplier.