• Title/Summary/Keyword: Compound semiconductor fabrication

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$Cu(In_{1-x}Ga_x)Se_2$ Thin Film Fabrication by Powder Process

  • Song, Bong-Geun;Cho, So-Hye;Jung, Jae-Hee;Bae, Gwi-Nam;Park, Hyung-Ho;Park, Jong-Ku
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2012.05a
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    • pp.92-92
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    • 2012
  • Chalcopyrite-type Cu(In,Ga)Se2 (CIGS) is one of the most attractive compound semiconductor materials for thin film solar cells. Among various approaches to prepare the CIGS thin film, the powder process offers an extremely simple and materials-efficient method. Here, we present the mechano-chemical synthesis of CIGS compound powders and their use as an ink material for screen-printing. During the synthesis process, milling time and speed were varied in the range of 10~600 min and 100~300 rpm, respectively. Both phase evolution and powder characteristics were carefully monitored by X-ray diffraction (XRD) method, scanning electron microscope (SEM) observation, and particle size analysis by scanning mobility particle spectrometer (SMPS) and aerodynamic particle sizer (APS). We found the optimal milling condition as 200 rpm for 120 min but also found that a monolithic phase of CIGS powders without severe particle aggregation was difficult to be obtained by the mechano-chemical milling alone. Therefore, the optimized milling condition was combined with an adequate heat-treatment (300oC for 60 min) to provide the monolithic CIGS powder of a single phase with affordable particle characteristics for the preparation of CIGS thin film. The powder was used to prepare an ink for screen printing with which dense CIGS thin films were fabricated under the controlled selenization. The morphology and electrical properties of the thin films were analyzed by SEM images and hall measurement, respectively.

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A Study on Properties of CuInS2 Thin Films by Cu/ln Ratio (Cu/In 비에 따른 CuInS2 박막의 특성에 관한 연구)

  • Yang, Hyeon-Hun;Park, Gye-Choon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.7
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    • pp.594-599
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    • 2007
  • [ $CulnS_2$ ] thin films were synthesized by sulfurization of Cu/In Stacked elemental layer deposited onto glass Substrates by vacuum furnace annealing at temperature $200^{\circ}C$. And structural and electrical properties were measured in order to certify optimum conditions for growth of the ternary compound semiconductor $CuInS_2$ thin films with non-stoichiometry composition. $CuInS_2$ thin film was well made at the annealed $200^{\circ}C$ of SLG/Cu/In/S stacked elemental layer which was prepared by thermal evaporator, and chemical composition of the thin film was analyzed nearly as the proportion of 1 : 1 : 2. Physical properties of the thin film were investigated at various fabrication conditions substrate temperature, annealing and temperature, annealing time by XRD, FE-SEM and Hall measurement system. The compositional deviations from the ideal chemical formula for $200^{\circ}C$ material can be conveniently described by non-molecularity$({\Delta}x=[Cu/In]-1)$ and non-stoichiometry $({\Delta}y=[{2S/(Cu+3In)}-1])$. The variation of ${\Delta}x$ would lead to the formation of equal number of donor and accepters and the films would behave like a compensated material. The ${\Delta}y$ parameter is related to the electronic defects and would determine the type of the majority charge carriers. Films with ${\Delta}y>0$ would behave as p-type material while ${\Delta}y<0$ would show n-type conductivity. At the sane time, carrier concentration, hall mobility and resistivity of the thin films was $9.10568{\times}10^{17}cm^{-3},\;312.502cm^2/V{\cdot}s\;and\;2.36{\times}10^{-2}\;{\Omega}{\cdot}cm$, respectively.

Exposure to Volatile Organic Compounds and Possibility of Exposure to By-product Volatile Organic Compounds in Photolithography Processes in Semiconductor Manufacturing Factories

  • Park, Seung-Hyun;Shin, Jung-Ah;Park, Hyun-Hee;Yi, Gwang-Yong;Chung, Kwang-Jae;Park, Hae-Dong;Kim, Kab-Bae;Lee, In-Seop
    • Safety and Health at Work
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    • v.2 no.3
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    • pp.210-217
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    • 2011
  • Objectives: The purpose of this study was to measure the concentration of volatile organic compound (VOC)s originated from the chemicals used and/or derived from the original parental chemicals in the photolithography processes of semiconductor manufacturing factories. Methods: A total of four photolithography processes in 4 Fabs at three different semiconductor manufacturing factories in Korea were selected for this study. This study investigated the types of chemicals used and generated during the photolithography process of each Fab, and the concentration levels of VOCs for each Fab. Results: A variety of organic compounds such as ketone, alcohol, and acetate compounds as well as aromatic compounds were used as solvents and developing agents in the processes. Also, the generation of by-products, such as toluene and phenol, was identified through a thermal decomposition experiment performed on a photoresist. The VOC concentration levels in the processes were lower than 5% of the threshold limit value (TLV)s. However, the air contaminated with chemical substances generated during the processes was re-circulated through the ventilation system, thereby affecting the airborne VOC concentrations in the photolithography processes. Conclusion: Tens of organic compounds were being used in the photolithography processes, though the types of chemical used varied with the factory. Also, by-products, such as aromatic compounds, could be generated during photoresist patterning by exposure to light. Although the airborne VOC concentrations resulting from the processes were lower than 5% of the TLVs, employees still could be exposed directly or indirectly to various types of VOCs.

RTA Effect on Transport Characteristics in Al0.25Ga0.75As/In0.2Ga0.8As pHEMT Epitaxial Structures Grown by Molecular Beam Epitaxy (MBE로 성장된 Al0.25Ga0.75As/In0.2Ga0.8As pHEMT 에피구조의 RTA에 따른 전도 특성)

  • Kim, Kyung-Hyun;Hong, Sung-Ui;Paek, Moon-Cheol;Cho, Kyung-Ik;Choi, Sang-Sik;Yang, Jeon-Wook;Shim, Kyu-Hwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.7
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    • pp.605-610
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    • 2006
  • We have investigated $Al_{0.25}Ga_{0.75}As/In_{0.2}Ga_{0.8}As$ structures for pseudomorphic high electron mobility transistor(pHEMT), which were grown by molecular beam epitaxy(MBE) and consequently annealed by rapid thermal anneal(RTA), using Hall measurement, photoluminescence, and transmission electron microscopy (TEM). According to intensity and full-width at half maximum maintained stable at the same energy level, the quantized energy level in $Al_{0.25}Ga_{0.75}As/In_{0.2}Ga_{0.8}As$ quantum wells was independent of the RTA conditions. However, the Hall mobility was decreased from $6,326cm^2/V.s\;to\;2,790cm^2/V.s\;and\;2,078cm^2/V.s$ after heat treatment respectively at $500^{\circ}C\;and\;600^{\circ}C$. The heat treatment which is indispensable during the fabrication procedure would cause catastrophic degradation in electrical transport properties. TEM observation revealed atomically non-uniform interfaces, but no dislocations were generated or propagated. From theoretical consideration about the mobility changes owing to inter-diffusion, the degraded mobility could be directly correlated to the interface scattering as long as samples were annealed below $600^{\circ}C$ lot 1 min.

Fabrication and characterization of grating-assisted co-directional coupler wavelength filter in InP (좁은 파장대역폭을 갖는 격자도움형 방향성 결합기 필터의 제작과 특성측정)

  • 김덕봉;박찬용;김정수;이승원;오광룡;김흥만;편광의;윤태훈
    • Korean Journal of Optics and Photonics
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    • v.8 no.2
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    • pp.149-153
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    • 1997
  • We demonstrate the operating characteristics(center wavelength, bandwidth, TE/TM polarization, tuning range) of grating-assisted co-directional coupler(GACC) filter fabricated with InGaAsP compound semiconductor. A design of waveguide structure has been focused on the narrow bandwidth characteristics of the filter. Reactive ion etching technique was employed for the uniform waveguide formation. The bandwidths(FWHM) and center wavelengths of the fabricated GACC filter were measured by 1.5 nm and 1530.6 nm for TE polarization and 1.3 nm and 1494.0 nm for TM polarization. This is the one of the narrowest bandwidth at 1530 nm region ever reported. The center wavelength shifted form 1530 nm to 1538 nm when the current of 100 mA was injected at 4.5 mm-long device. Good agreement between the designed and measured operating characteristics for some waveguide structures is demonstrated.

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Effect of Annealing under Antimony Ambient on Structural Recovery of Plasma-damaged InSb(100) Surface

  • Seok, Cheol-Gyun;Choe, Min-Gyeong;Jeong, Jin-Uk;Park, Se-Hun;Park, Yong-Jo;Yang, In-Sang;Yun, Ui-Jun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.203-203
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    • 2014
  • Due to the electrical properties such as narrow bandgap and high carrier mobility, indium antimonide (InSb) has attracted a lot of attention recently. For the fabrication of electronic or photonic devices, an etching process is required. However, during etching process, enegetic ions can induce structural damages on the bombarded surface. Especially, InSb has a very weak binding energy between In atom and Sb stom, it can be easily damaged by impingement of ions. In the previous work, to evaluate the surface properties after Ar ion beam etching, the plasma-induced structural damage on the etched InSb(100) surface had been examined by resonant Raman spectroscopy. As a result, we demonstrated the relation between the enhanced transverse optical(TO) peak in the Raman spectrum and the ion-induced structral damage near the InSb surface. In this work, the annealing effect on the etched InSb(100) surface has investigated. Annealing process was performed at $450^{\circ}C$ for 10 minute under antimony ambient. As-etched InSb(100) surface had shown a strongly enhanced TO scattering intensity in the Raman spectrum. However, the annealing process with antimony flowing caused the intensity to recover due to the structural reordering and the reduction of antimony vacancies. It proves that the origin of enhanced TO scattering is Sb vacancies. Furthermore, it shows that etching-induced damage can be cured effectively by the following annealing process under Sb ambient.

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Sputtering of Solid Surfaces at Ion Bombardment

  • Kang, Hee-Jae
    • Proceedings of the Korean Vacuum Society Conference
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    • 1998.02a
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    • pp.20-20
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    • 1998
  • I Ion beam technology has recently attracted much interest because it has exciting t technological p아:ential for surface analysis, ion beam mixing, surface cleaning and etching i in thin film growth and semiconductor fabrication processes, etc. Es야~cially, ion beam s sputtering has been widely used for sputter depth profiling with x-photoelectron S spectroscopy (XPS) , Auger electron s$\pi$~troscopy(AES), and secondary-ion mass S야i따oscopy(SIMS). However, The problem of surface compositional ch없1ge due to ion b bombardment remains to be understo여 없ld solved. So far sputtering processes have been s studied by s따face an외ysis tools such as XPS, AES, and SIMS which use the sputtering p process again. It would be improbable to measure the modified surface composition profiles a accurately due to ion beam bombardment with surface analysis techniques based on sputter d depth profiling. However, recently Medium energy ion scattering spectroscopy(MEIS) has b been applied to study the sputtering of solid surface at ion bombardment and has been p proved that it has been extremely valuable in probing the surface composition 뻐d s structure nondestructively and quantita디vely with less than 1.0 nm depth resolution. To u understand the sputtering processes of solid surface at ion bombardment, The Molecular D Dynamics(MD) and Monte Carlo(MC) simulation has been used and give an intimate i insight into the sputtering processes of solid surfaces. In this presentation, the sputtering processes of alloys and compound samples at ion b bombardment will be reviewed and the MEIS results for the Ar+ sputter induced altered l layer of the TazOs thin film 뻐dd없nage profiling of Ar+ ion sputt얹"ed Si(100) surface will b be discussed with the results of MD and MC simulation.tion.

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A Study of the Properties of CuInS2 Thin Film by Sulfurization

  • Yang, Hyeon-Hun;Park, Gye-Choon
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.2
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    • pp.73-76
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    • 2010
  • The copper indium disulfide ($CuInS_2$) thin film was manufactured using sputtering and thermal evaporation methods, and the annealing with sulfurization process was used in the vacuum chamber to the substrate temperature on the glass substrate, the annealing temperature and the composition ratio, and the characteristics thereof were investigated. The $CuInS_2$ thin film was manufactured by the sulfurization of a soda lime glass (SLG) Cu/In/S stacked [1] elemental layer deposited on a glass substrate by vacuum chamber annealing [2] with sulfurization for various times at a temperature of substrate temperature of $200^{\circ}C$. The structure and electrical properties of the film was measured in order to determine the optimum conditions for the growth of $CuInS_2$ ternary compound semiconductor $CuInS_2$ thin films with a non-stoichiometric composition. The physical properties of the thin film were investigated under various fabrication conditions [3,4], including the substrate temperature, annealing temperature and annealing time by X-ray diffraction (XRD), field Emission scanning electron microscope (FE-SEM), and Hall measurement systems. [5] The sputtering rate depending upon the DC/RF power was controlled so that the composition ratio of Cu versus In might be around 1:1, and the substrate temperature affecting the quality of the film was varied in the range of room temperature (RT) to $300^{\circ}C$ at intervals of $100^{\circ}C$, and the annealing temperature of the thin film was varied RT to $550^{\circ}C$ in intervals of $100^{\circ}C$.

Fabrication of Environmental-friendly Materials Using Atomic Layer Deposition (원자층 증착을 이용한 친환경 소재의 제조)

  • Kim, Young Dok
    • Applied Chemistry for Engineering
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    • v.23 no.1
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    • pp.1-7
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    • 2012
  • In this article, I will introduce recent developments of environmental-friendly materials fabricated using atomic layer deposition (ALD). Advantages of ALD include fine control of the thin film thickness and formation of a homogeneous thin fim on complex-structured three-dimensional substrates. Such advantages of ALD can be exploited for fabricating environmental-friendly materials. Porous membranes such as anodic aluminum oxide (AAO) can be used as a substrate for $TiO_2$ coating with a thickness of about 10 nm, and the $TiO_2$-coated AAO can be used as filter of volatile organic compound such as toluene. The unique structural property of AAO in combination with a high adsorption capacity of amorphous $TiO_2$ can be exploited in this case. $TiO_2$ can be also deposited on nanodiamonds and Ni powder, which can be used as photocatalyst for degradation of toluene, and $CO_2$ reforming of methane catalyst, respectively. One can produce structures, in which the substrates are only partially covered by $TiO_2$ domains, and these structures turns out to be catalytically more active than bare substrates, or complete core-shell structures. We show that the ALD can be widely used not only in the semiconductor industry, but also environmental science.

Numerical Analysis of Warpage and Reliability of Fan-out Wafer Level Package (수치해석을 이용한 팬 아웃 웨이퍼 레벨 패키지의 휨 경향 및 신뢰성 연구)

  • Lee, Mi Kyoung;Jeoung, Jin Wook;Ock, Jin Young;Choa, Sung-Hoon
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.1
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    • pp.31-39
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    • 2014
  • For mobile application, semiconductor packages are increasingly moving toward high density, miniaturization, lighter and multi-functions. Typical wafer level packages (WLP) is fan-in design, it can not meet high I/O requirement. The fan-out wafer level packages (FOWLPs) with reconfiguration technology have recently emerged as a new WLP technology. In FOWLP, warpage is one of the most critical issues since the thickness of FOWLP is thinner than traditional IC package and warpage of WLP is much larger than the die level package. Warpage affects the throughput and yield of the next manufacturing process as well as wafer handling and fabrication processability. In this study, we investigated the characteristics of warpage and main parameters which affect the warpage deformation of FOWLP using the finite element numerical simulation. In order to minimize the warpage, the characteristics of warpage for various epoxy mold compounds (EMCs) and carrier materials are investigated, and DOE optimization is also performed. In particular, warpage after EMC molding and after carrier detachment process were analyzed respectively. The simulation results indicate that the most influential factor on warpage is CTE of EMC after molding process. EMC material of low CTE and high Tg (glass transition temperature) will reduce the warpage. For carrier material, Alloy42 shows the lowest warpage. Therefore, considering the cost, oxidation and thermal conductivity, Alloy42 or SUS304 is recommend for a carrier material.