• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.480-484
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• 1999

In this paper, a design technique of SMPS using plannar transformer is described. The application of plannar transformer can solve the space problem which occurs when it is installed on PCB since plannar transformer has low profile. In addition a lossless snubber circuit added to reduce the device stress and to improve the system efficiency. The designed system is verifed by simulation and experiment with comparison of efficiency between the system using conventional transformer and the system using plannar transformer.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1998.10a
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• pp.222-227
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• 1998

The paper proposes a new method for measuring the flow ripple generated by an axial piston pump and motor in a hydrostatic transmission. The method is based on dynamic characteristics between pressure and flow ripple in the pipeline. Also, the self-checking functions develop for the evaluation of accuracy and dynamic response of estimated results by the method proposed here. The experiment carry out open circuit type hydrostatic transmission. By using the self-checking functions, the validity of the method is investigated by comparison with the measured and estimated flow and pressure ripples, and good agreement is achieved.

• 전기의세계
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• v.31 no.1
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• pp.68-73
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• 1982

An accurate mathematical model of permanent magnet stepping motor is proposed. On the basis of this model, micro-stepping control is experimented. A comparison is made between the Data experimented by micro-stepping control and the data predicted by the proposed model and by Leenhouts' earlier model. The result shows that the proposed model is more accurate than the earlier model, and micro-stepping can be attained by dividing a given step electrically, without adding much complexity to the control circuit, or degrading the speed of stepping motors.

• Journal of information and communication convergence engineering
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• v.2 no.2
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• pp.102-105
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• 2004

A Quadrature phase detector for high-speed delay-locked loop is introduced. The proposed Quadrature phase detector is composed of two nor gates and it determines if the phase difference of two input clocks is 90 degrees or not. The delay locked loop circuit including the Quadrature phase detector is fabricated in a 0.18 um Standard CMOS process and it operates at 5 GHz frequency. The phase error of the delay-locked loop is maximum 2 degrees and the circuits are robust with voltage, temperature variations.

• Proceedings of the KIPE Conference
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• 2018.11a
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• pp.203-204
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• 2018

Conventional buck-boost converter has the disadvantage that the output voltage is inverted. The single phase non-inverting buck-boost converter(SPNIBBC) used four swithes has H-bridge type Circuit. The output voltage is not inverted. The SPNIBBC can be controlled by the single carrier method and the dual carrier method according to the modulation method. In this paper, we have fabricated the converter and compared the efficiency according to the modulation method.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.727-730
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• 2005

In this paper, we propose a new current sense amplifier for low-voltage, high-speed SRAM. As a supply voltage is reduced, a sensing delay is increased owing to reduced cell read current. It causes a low-speed operation in SRAM. To overcome this problem, we present a new current sense amplifier which consists of the current-mirror type circuit with feedback structure. For demonstration, a 0.8-V, 256-Kb SRAM incorporating the proposed current sense amplifier has been designed with $0.18-{\mu}m$ CMOS technology. The simulation results show 15.6ns of the sensing delay reduction in comparison with a previous current sense amplifier and 11.5ns of the sensing delay reduction in comparison with a voltage sense amplifier.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.67-70
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• 2003

In this paper the main topologies of one-bit full adders, including the most interesting of those recently proposed, are analyzed and compared for speed, power consumption, and power-delay product. The comparison has been performed on circuits, optimized transistor dimension to minimize power-delay product. The investigation has been carried out with properly defined simulation runs on a Cadence environment using a 0.25-${\mu}m$ process, also including the parasitics derived from layout. Performance has been also compared for different supply voltage values. Thus design guidelines have been derived to select the most suitable topology for the design features required. This paper also proposes a novel figure of merit to realistically compare n-bit adders implemented as a chain of one-bit full adders. The results differ from those previously published both for the more realistic simulations carried out and the more appropriate figure of merit used. They show that, except for short chains of blocks or for cases where minimum power consumption is desired, topologies with only pass transistors or transmission gates are not attractive.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.988-991
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• 2004

In the paper, a four-phase 16/12 structure Switched Reluctance motor drive is presented. The construction of the stator and the rotor in the motor, the scheme of the rotor position detector and the main circuit of the power converter are described. The comparison of the four-phase 16/12 motor and the four-phase 8/6 motor and the comparison of the four-phase 16/12 motor and the three-phase 12/8 motor are made. In the controller, the PWM control variable-speed control, the commutation control, the four quadrants control, the overvoltage protection, the over current protection and the under voltage protection could be achieved. Tested results of the developed prototype are made.

• Journal of Electrical Engineering and Technology
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• v.8 no.1
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• pp.118-123
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• 2013

This paper presents performance comparison between concentrated winding and distributed winding of IPMSM (Interior Permanent Magnet Synchronous Motors) which is recently used for light-weight railway applications. Motors are designed on various schemes and analyzed by using FEM (Finite Element Method) instead of EMCNM (Equivalent Magnetic Circuit Network Method) in order to take into account saturation and non-linear magnetic property. The overall performance such as torque, torque ripple, losses, demagnetization, efficiency, power density and so on are investigated in detail at the rated and maximum operating speed. The results of the analysis found that both concentrated and distributed winding IPMSMs are promising candidates for high power railway traction motor.

• Proceedings of the KIPE Conference
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• 2002.07a
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• pp.415-418
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• 2002

In the paper, a four-phase 16/12 structure Switched Reluctance motor drive is presented. The construction of the stator and the rotor in the motor, the scheme of the rotor position detector and the main circuit of the power converter are described. The comparison of the four-phase 16/12 motor and the four-phase 816 motor and the comparison of the four-phase 16/12 motor and the three-phase 12/8 motor are made. In the controller, the PWM control variable-speed control, the commutation control, the four quadrants control, the overvoltage protection, the overcurrent protection and the under voltage protection could be achieved. Tested results of the developed prototype are made.