• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.186-190
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• 2000

This paper propose a "Active common-mode voltage damper circuit" that capable of a suppression of a common-mode voltage produced in the PWM VSI. The four level half-bridge PWM inverter circuit and common-mode transformer are incorporated into the "Active common-mode voltage damper" the design method of which is presented Effect of "Active common-mode voltage damper" in this paper verifies a propriety and effectiveness in 2.2[kW] induction motor drive using IGBT inverter. Experimental results show that "common-mode voltage damper" makes contributions to reducing a high frequency leakage current and common-mode voltage.leakage current and common-mode voltage.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 전력전자학술대회 논문집
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• pp.151-154
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• 2001

This paper propose a new active common-mode voltage damper circuit that is capable of suppressing a common-mode voltage produced in the PWM VSI. The new active common mode voltage damper is consisted of a half-bridge inverter and a common mode transformer with a blocking capacitor. Principle of the active common mode damper is as follow; by applying the compensation voltage which has the same amplitude and opposite polarity to the PWM inverter system. So, common mode voltage and high frequency leakage current can be reduced. Simulated and experimental results show that common-mode voltage damper makes contributions to reducing a high frequency leakage current and common-mode voltage.

• Journal of Power Electronics
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• 제15권3호
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• pp.712-720
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• 2015

A model predictive current control (MPCC) method that does not employ a cost function is proposed. The MPCC method can decrease common-mode voltages in loads fed by three-phase voltage-source inverters. Only non-zero-voltage vectors are considered as finite control elements to regulate load currents and decrease common-mode voltages. Furthermore, the three-phase future reference voltage vector is calculated on the basis of an inverse dynamics model, and the location of the one-step future voltage vector is determined at every sampling period. Given this location, a non-zero optimal future voltage vector is directly determined without repeatedly calculating the cost values obtained by each voltage vector through a cost function. Without utilizing the zero-voltage vectors, the proposed MPCC method can restrict the common-mode voltage within ± V_dc/6, whereas the common-mode voltages of the conventional MPCC method vary within ± V_dc/2. The performance of the proposed method with the reduced common-mode voltage and no cost function is evaluated in terms of the total harmonic distortions and current errors of the load currents. Simulation and experimental results are presented to verify the effectiveness of the proposed method operated without a cost function, which can reduce the common-mode voltage.

• 전력전자학회논문지
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• 제6권5호
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• pp.423-431
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• 2001

최근의 유도전동기 구동 시스템은 고속의 ON, OFF동작 특성을 가진 전력 반도체 소자를 가진 인버터와 이를 제어하기 위한 SVPWM(Space Vector PWM)제어이론에 의하여 주로 구성되어 있다. 이러한 PWM 인버터는 정현파 형태의 전압과 전류를 얻기 위해 높은 스위칭 주파수로 동작을 하게 되고, 매 스위칭이 일어나는 순간마다 di/dt 및 dv/dt가 매우 크기 때문에 무시할 수 없는 양의 고주파 누설전류가 고정자 권선과 프레임 사이에 존재하는 기생 커패시터를 통해 접지로 흐르게 된다. 이로 인해 누전보호 계전기의 오동작 및 모터 권선의 절연파괴에 의한 모터의 수명단축 등과 같은 문제점을 야기하게 된다. 본 논문에서는 이러한 문제점을 일으키는 고주파 누설 전류와 커먼 모드 전압을 감쇄하기 위하여 4 레벨 반파 브릿지 인버터에 의해 커먼 모드 전압과 크기가 같고 극성이 반대인 전압을 생성하고, 이 전압을 커먼 모드 트랜스포머에 인가하여 누설 전류의 원인이 되는 커먼 모드 전압을 상쇄시킬 수 있는 새로운 형태의 능동형 커먼 모드 전압 감쇄기를 제안하였다. 제안된 감쇄기의 동작 성능을 P-SPICE를 이용한 시뮬레이션 및 실험을 통하여 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1999년도 전력전자학술대회 논문집
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• pp.373-376
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• 1999

This paper propose a "common mode voltage damper" that is capable of reducing the common mode voltage produced in the PWM VSI. An push-pull circuits and high frequency leakage current damper[1] are incorporated into the "common mode voltage damper", the design method of which is presented. Effect of "common mode voltage damper" is simulated in this paper verifies the viability and effectiveness in 2.2kW induction motor drive using IGBT inverter. Simulated results show that "common mode voltage damper" makes significant contributions to reducing a high frequency leakage current.ducing a high frequency leakage current.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.171-175
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• 1998

This paper proposes the advanced PWM method that can reduce common-mode voltage in three-phase PWM converter-inverter system. By the proper distribution of the zero-voltage vector of inverter, it is possible to cancel out a common-mode voltage pulse in a sampling period. Since the proposed PWM method maintains the effective-voltage vector, it does not affect the control performance of converter-inverter system. Without any extra hardware, overall common-mode voltage can be decreased by one-third compared with conventional PWM scheme.

• 전력전자학회논문지
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• 제19권6호
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• pp.488-493
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• 2014

This paper presents a carrier-based pulse-width modulation(PWM) method for reducing the common-mode voltage of a three-level four-leg converter. The idea of the proposed PWM method is intuitive and easy to be implemented in digital signal processor-based converter control systems. On the basis of the analysis of space-vector PWM(SVPWM) and sinusoidal PWM(SPWM) switching patterns, the fourth leg pole voltage of the three-phase converter called "f leg pole voltage" is manipulated to reduce the common-mode voltage. To synthesize f leg pole voltage for the suppression of the common-mode voltage, positive and negative pole voltage references of f leg are calculated. An offset voltage is also deduced to prevent the distortion of a, b, and c phase voltages. The feasibility of the proposed PWM method is verified by simulation and experimental results. The common-mode voltage of the proposed PWM method in peak-to-peak value is 33% in comparison with that of the conventional SVPWM method. The transition number of the common-mode voltage is also reduced to 25%.

• 전력전자학회논문지
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• 제21권1호
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• pp.27-33
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• 2016

A pulse-width modulation (PWM) method for common mode noise reduction in a PWM inverter connected to a single-phase grid is proposed in this study. The extensively used conventional switching method may experience common mode voltage problems, which generate current leakage and electromagnetic induction problems. In the proposed switching method, the neutral point of the output voltage is always fixed at both ends of the input voltage to reduce common mode noise. The validity of the proposed method is proven through simulation and experimental results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2002년도 전력전자학술대회 논문집
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• pp.355-359
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• 2002

Much attention has been given to EMI effects created in variable speed ac drive system. Zero switching states of inverter control invoke large common mode voltage. This paper focuses on the switching techniques to mitigate common mode voltage. This paper proposes a common-mode voltage reduction method based on sinusoidal pulse width modulation in three phase PWM inverter system. By using three carriers wave displaced by 120 degrees, it is possible to eliminate a common mode voltage pulse In one control period. Simulation and experimental results show that common mode voltages In the proposed technique are reduced more than conventional technique.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제48권2호
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• pp.89-96
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• 1999

This paper proposes a common-mode voltage reduction method base on SVPWM(Space-Vector Pulsewidth Modulation) in three phase PWM converter/inverter system. By shifting the active voltage vector of inverter and aligning this to the active vector of converter, it is possible to eliminate a common-mode voltage pulse in one control period. Since the proposed PWM method maintains the active voltage vector, it does not affect the control performance of PWM converter/inverter system. Without any extra hardware, overall common mode voltage dv/dt and conrresponding leakage current can be reduced to two-third of the conventional three phase symmetric SVPWM scheme.