• 건축역사연구
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• 제18권5호
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• pp.81-100
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• 2009

The study on Buddhism architecture in early Joseon dynasty was inactive. The period of King Sejo is important for studying the trend of Buddhism architecture in early Joseon, that was transmitted from the end of Goryeo dynasty, but it was difficult to know its exact situation due to lack of related records. The records were all written by Kim Su-ohn, which are Wongaksabi' 'Sangwonsajungchanggi' 'Bongseonsagi 'Geonginsajungchanggi'. The main hall was mainly second floor and there were necessarily annexed buildings at the right and left of the main hall. So the plane figure of $\Box\Box\Box$ was shown. It was a main stream for main hall. This layout may be referred to search for the origin of the layout in courtyard based structure(中庭形) in the late Joseon dynasty. Most of temples had 3 gates. Some part of horizontal corridor was used as 2 gates and the outer gate, far from main hall, was without corridor. The gate leading to front yard of main hall was called front gate, the next middle gate and the outer gate was Oisamun(外沙門) or Samun(沙門). Im most of the temples, people could enter into the front yard through pavilion which had the function of bell tower. The pavilions were located between front gate and first corridor. It is thought that this layout of the place for making bean curd outside the temple area will contribute to different studies on temples making bean cure in the future. The records about temples's foundation studied above are a little different between temples, but have more similarities. There common denominators represent the architecture tendency of Buddhist temples in the related period. It is thought that such a tendency was also shown on architecture of other temples during the reign of King Sejo as well as Buddhist temples.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.241-244
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• 2012

본 논문에서는 CMOS $0.35-{\mu}m$ 공정을 이용하여 Plastic Optical Fiber (POF) 응용분야에 적용할 수 있는 세 종류의 shunt-feedback 구조의 1-Gb/s 광 수신기를 설계하고 비교분석하였다. 기본적인 common-source transimpedance amplifier (CS-TIA), common-gate TIA (CG-TIA), 그리고 regulated-cascode TIA (RGC-TIA)를 최적화 설계하여 이득, 대역폭, 잡음특성 등을 비교분석 하였다. 시뮬레이션 테스트 결과 RGC-TIA가 CS-TIA, CG-TIA 보다 이득, 대역폭 측면에서 가장 좋은 성능을 보였으며, 잡음특성 측면에서는 CS-TIA가 가장 좋은 성능을 보였다. 각 광 수신기의 칩 사이즈는 bonding Pad를 포함하여 $0.35mm^2$이다.

• 한국전자파학회논문지
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• 제11권1호
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• pp.84-92
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• 2000

2.4 GHz 대역 WLL 단말기용 GaAs MESFET MMIC 송신기를 설계하고 제작하였다. 설계된 송신기는 이중 평형 능동형 혼합기와 전압 부궤환 구조를 갖는 2단 구동증폭기로 구성하였다. 특히, 한 쌍의 소스 접지-게이트 접지(Common-Source. Common -Gate: CSCG) 구조를 사용하여 IF 입력 선호의 비대칭성으로 인한 동작영역 감소를 보상하였다. 또한 MESFET의 단자간 위상 특성을 이용하여 국부 발진기(La) 신호의 누설 전력을 억제 하였다. 제작된 칩의 크기는 $0.75\times1.75 mm^2$이었고 측정 결과 2.7 V. 55.2 mA에서 386 dB의 변환이득. 11.6 dBm 의 출력$P_{idB}$ 구동증폭기의 RF 출력 -5dBm에서 - 31.5 dBc의 IMD3의 특성을 얻었다. 따라서 제작된 송신기는 WLL 단말기에 적용 가능하다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.261-264
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• 2005

This paper presents the design of a down-conversion mixer with built-in active balun integrated in a $0.25\;{\mu}m$ pHEMT process. The active balun consists of series-connected common-gate FET and common-source FET. The designed balun achieved broadband characteristics by optimizing gate-width and bias condition for the reduction in parasitic effect. From DC to more than 6GHz, the active balun shows the phase error of less than 3 degree and the gain error of less than 0.4 dB. A single-balanced down-conversion mixer with built-in broadband active balun has been designed with optimum width, load resistor and bias for conversion gain and without any matching component for broadband operating. The designed mixer whose size of including on-chip bias circuit is $1\;mm{\times}1\;mm$ shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz and $P_{1dB}$ of -10 dBm at 5.8 GHz

• 전자공학회논문지
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• 제54권2호
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• pp.53-57
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• 2017

본 논문에서는 의료 기기용 401MHz - 406MHz MedRadio 대역에서 사용하는 저잡음 증폭기를 제안한다. 제안한 저잡음 증폭기는 전류 재사용 gm-boosting 기술을 이용한 공통 게이트 증폭기 구조를 채택하여 기존의 gm-boosted 공통 게이트 증폭기에 비해 동일한 전력소모에서 더 높은 전압 이득과 더 낮은 잡음 지수 특성을 얻었다. 제안한 전류 재사용 gm-boosted 저잡음 증폭기는 $0.13{\mu}m$ CMOS 공정을 사용하여 설계하였고, 22 dB의 전압 이득, 2.95 dB의 잡음 지수, -17 dBm의 IIP3 특성을 보이며, 공급 전압 0.5 V에서 $170{\mu}W$의 전력을 소비한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.84-87
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• 2000

In this paper, a high gain-broad bandwidth MMIC distributed amplifier was designed using cascaded single section distributed amplifier configuration. The PHEMT for this studies was fabricated at our lab The PHEMT has a 0.2 $\mu\textrm{m}$ gate length. a 80 $\mu\textrm{m}$ unit gate width and 4 gate fingers. A designed MMIC amplifier have higher S$\sub$21/ gain than the common distributed amplifier using the same number of active devices. From the simulated result, we obtained that the S$\sub$21/ gain of DC ∼ 20 GHz bandwidth was 15.6 dB and flatness was ${\pm}$0.9 dB, and input and output reflection coefficient were lower than -8 dB. The simulated gain shows an improvement 7.3 dB compared with those of conventional distributed amplifier. And the chip size is 2.0 ${\times}$ 1.2 $\textrm{mm}^2$.

• 대한한의학회지
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• 제17권2호
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• pp.88-99
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• 1996

Impotence is defined as a consistent inability to achieve or maintain penile erection that is adequate for completion of sexual intercourse. In oriental midicine, the chief cause of impotence is the decline of the fire from the gate of life, and in western medicine that is psycogenic and organic. Because of the increase aging people and psycologic stress that modern people get, impotence became common. This bibliographic study on impotence in the oriental and western medicine books has come to the following conclusions. 1. The main cause of impotence in the oriental medicine is the decline of the fire from the gate of life(命門火衰), followed by the deficiency of both heart and spleen(心脾兩虛), the depression of Liver energy(肝氣鬱結), and attack of blended wetness and heat to the lower wanner(濕熱下注). 2. The theraphics of impotence in oriental medicine are warming and strenghthening Kidney. softness of Liver energy, tonifying the Kidney to relieve mental strain, clear away the wetness-heat, and infairment of Heart and Spleen. 3. The prescriptions of impotence are Yugyeyum, Gyibitang, Soyosan, Sunjitang, and Yongdamsagantang. 4. In the western medicine, psycotherapy, medical therapy and surgical therapy are the major way to treat impotence.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 추계학술대회 논문집 Vol.15
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• pp.35-38
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• 2002

In this paper, the characteristics of channel hot electron (CHE) injection for the write operation in a NOR-type SONOS flash memory with common source line were investigated. The thicknesses of he tunnel oxide, the memory nitride， and the blocking oxide layers for the gate insulator of the fabricated SONOS devices were $34{\AA}$, $73{\AA}$, and $34{\AA}$, respectively. The SONOS devices compared to floating gate devices have many advantages, which are a simpler cell structure, compatibility with conventional logic CMOS process and a superior scalability. For these reasons, the introduction of SONOS device has stimulated. In the conventional SONOS devices, Modified Folwer-Nordheim (MFN) tunneling and CHE injection for writing require high voltages, which are typically in the range of 9 V to 15 V. However CHE injection in our devices was achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The memory window of about 3.2 V and the write speed of $100{\mu}s$ were obtained. Also, the disturbance and drain turn-on leakage during CHE injection were not affected in the SONOS array. These results show that CHE injection can be achieved with a low voltage and single power supply, and applied for the high speed program of the SONOS memory devices.

• 대한전자공학회논문지
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• 제11권6호
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• pp.16-24
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• 1974

본 논문은 종래의 NIC회로의 구성방법을 종합하여 일반화하는 방법으로써 파라미터 제어회로와 전압 또는 전류제어회로에 의한 NIC구성방법을 제시하였다. 그리고 FET에 의해 개방 및 단락안정형 NIC회로를 구성하고 회로해석에 의한 임피던스와 실험치를 비교하여 NIC특성을 확인하고 회로해석이 타당함을 검토 확인하였다. 또한 병렬 LC를 NIC와 직렬로 연결하여 발진상태를 실험으로 확인하고 NR에 의한 발진상태와 비교 검토하였다.

• Journal of Power Electronics
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• 제16권4호
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• pp.1316-1323
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• 2016

Multilevel inverters (MLIs) have been preferred over conventional two-level inverters due to their inherent properties such as reduced harmonic distortion, lower electromagnetic interference, minimal common mode voltage, ability to synthesize medium/high voltage from low voltage sources, etc. On the other hand, they suffer from an increased number of switching devices, complex gate pulse generation, etc. This paper develops an ingenious symmetrical MLI topology, which consumes lesser component count. The proposed level dependent sources concoction multilevel inverter (LDSCMLI) is basically a multilevel dc link MLI (MLDCMLI), which first synthesizes a stepped dc link voltage using a sources concoction module and then realizes the ac waveform through a conventional H-bridge. Seven level and eleven level versions of the proposed topology are simulated in MATLAB r2010b and prototypes are constructed to validate the performance. The proposed topology requires lesser components compared to recent component reduced MLI topologies and the classical topologies. In addition, it requires fewer carrier signals and gate driver circuits.