• Proceedings of the KIPE Conference
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• 2015.11a
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• pp.29-30
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• 2015

본 논문에서는 3레벨 인버터의 common mode voltage 변동을 줄여주는 스위칭 방식인 MVPWM(Medium Vector PWM)을 비엔나 정류기에 적용하는 방식을 제안한다. MVPWM은 3개의 상의 reference중의 중간 값일 때의 스위칭 신호를 medium vector가 되도록 바꿔서 3개의 상의 합이 0이 될 수 있게 만들어주므로 인해 common mode voltage변동이 저감된다. 이를 PSIM을 사용하여 모의해석과 실험을 통해 효과를 입증하였다.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.85-93
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• 2007

This paper presents new LVDS I/O circuits with a high noise margin for use in highly parallel I/O environments. The proposed LVDS I/O includes transmitter and receiver parts. The transmitter circuits consist of a differential phase splitter and a output stage with common mode feedback(CMFB). The differential phase splitter generates a pair of differential signals which have a balanced duty cycle and $180^{\circ}$ phase difference over a wide supply voltage variation due to SSO(simultaneous switching output) noises. The CMFB output stage produces the required constant output current and maintains the required VCM(common mode voltage) within ${\pm}$0.1V tolerance without external circuits in a SSO environment. The proposed receiver circuits in this paper utilizes a three-stage structure(single-ended differential amp., common source amp., output stage) to accurately receive high-speed signals. The receiver part employs a very wide common mode input range differential amplifier(VCDA). As a result, the receiver improves the immunities for the common mode noise and for the supply voltage difference, represented by Vgdp, between the transmitter and receiver sides. Also, the receiver produces a rail-to-rail, full swing output voltage with a balanced duty cycle(50% ${\pm}$ 3%) without external circuits in a SSO environment, which enables correct data recovery. The proposed LVDS I/O circuits have been designed and simulated with 0.18um TSMC library using H-SPICE.

• Journal of Power Electronics
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• v.18 no.2
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• pp.343-355
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• 2018

A wide-voltage-conversion range bidirectional DC-DC converter is proposed in this paper. The topology is comprised of one typical LC energy storage component and a special common grounded asymmetric H-bridge with four active power switches/anti-parallel diodes. The narrow output PWM voltage is generated from the voltage difference between two normal (wider) output PWM voltages from the asymmetric H-bridge with duty cycles close to 0.5. The equivalent switching frequency of the output PWM voltage is double the actual switching frequency, and a wide step-down/step-up ratio range is achieved. A 300W prototype has been constructed to validate the feasibility and effectiveness of the proposed bidirectional converter between the variable low voltage side (24V~48V) and the constant high voltage side (200V). The slave active power switches allow ZVS turn-on and turn-off without requiring any extra hardware. The maximum conversion efficiency is 94.7% in the step-down mode and 93.5% in the step-up mode. Therefore, the proposed bidirectional topology with a common ground is suitable for energy storage systems such as renewable power generation systems and electric vehicles with a hybrid energy source.

• Journal of Electrical Engineering and Technology
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• v.13 no.3
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• pp.1212-1222
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• 2018

This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.769-773
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• 2004

Conventional SVPWM method has null switching vectors. Null switching vectors cause high common-mode voltage in induction motor drive system. The newly developed common mode voltage reduction PWM technique don't use zero switching state for inverter control. It is realized by changing software without additional hardware. Simulation and experimental results show that proposed method are reduced common mode voltage more than conventional method.

• Proceedings of the KIPE Conference
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• 2004.07a
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• pp.384-388
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• 2004

High frequency common mode voltage produced by power inverters are a major cause of conducted EMI, creating motor ground currents, bearing currents and other harmful by products. This paper focuses on a new SVPWM method with random PWM injection to reduce conducted EMI noise. A New PWM technique associated with the common mode voltage can be significantly reducing and contributes to mitigate. The common mode voltage to $50\%$ in comparison with that for conventional SVPWM technique. Validation of the theory and reduction methods are then performed experiment ally based on an induction motor drive.

• Journal of Power Electronics
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• v.13 no.4
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• pp.647-655
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• 2013

In this paper, an approach to reduce the common-mode voltage and to eliminate narrow pulse for implemented AC-DC matrix converters is presented. An improved space vector modulation (SVM) strategy is developed by replacing the zero space vectors with suitable pairs of active ones. Further, while considering the commutation time, the probability of narrow pulse in the conventional and proposed SVM methods are derived and compared. The advantages of the proposed scheme include: a 50% reduction in the peak value of the common-mode voltage; improved input and output performances; a reduction in the switching loss by a reduced number of switching commutations and a simplified implementation via software. Experimental results are presented to demonstrate the correctness of the theoretical analysis, as well as the feasibility of the proposed strategy.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2004.05a
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• pp.540-545
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• 2004

Conventional SVPWM method has null switching vectors. Null switching vectors cause common-mode voltage making high in induction motor drive system. New SVPWM method without using null switching vectors are proposed in the paper. So, new SVPWM method reduces the common mode voltage for induction motor drive system. It is realized by changing software without adding hardware to induction motor drive system. Simulation results show that common-mode voltage adapting proposed method are reduced regarding conventional method.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.3
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• pp.246-253
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• 2000

전동기의 제어기법과 제어기 등의 발달로 유도전동기는 산업용으로 널리 보급되고 있으며, 유도전동기를 고효율로 제어하기 위하여 PWM 인버터가 널리 사용되고 있다. 그리고 IGBT와 같은 고속 스위칭 소자의 발달로 인해 전압형 PWM 인버터의 스위칭 주파수가 증가가 가능하게 됐으며, 그로 인해 매우 우수한 동작 특성을 가지게 되었다. 그러나 고속 스위칭은 전압과 전류의 급격한 변화로 인해 매 스위칭마다 발생하는 고주파 성분의 커먼 모드전압과 전류를 발생하게 되고 이들은 베어링 전류와 축전압, 전도 및 방사 EMI, 기기의 절연수명 단축, 등의 악영향을 유발한다. 본 연구에서는 이러한 커먼 모드 전압과 전류에 대한 시스템 레벨 해석이 가능한 시뮬레이션 기법에 대해 실제 측정과 시뮬레이션을 통해 검정하였다. 이를 통해서 커먼 모드 전압과 전류가 PWM 인버터 시스템의 각 부에 미치는 영향을 쉽게 확인 할 수 있으며, 커먼 모드 전압과 전류의 저감을 위해 추가될 수 있는 부가적인 보조회로의 영향에 대해서도 제시된 시뮬레이션 기법을 통해 확인 할 수 있다.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.2
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• pp.135-140
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• 2021

This study introduces a new pulse width modulation (PWM) method to reduce common-mode voltages (CMVs) and then compares its performance with other reduced CMV-PWM (RCMV-PWM) methods. CMVs should be reduced to ensure the electromagnetic compatibility and safety of grid-connected inverters. RCMV-PWM methods attempt to synthesize voltage references without zero vectors, which cause high CMV peaks. In these methods, the peak-to-peak magnitude of CMVs can be reduced by one-third of the conventional space-vector PWM. The introduced method splits every reference vector into two vectors to avoid the use of zero vectors. The performances of the RCMV-PWM methods are analyzed in accordance with the modulation index through simulation and experiment.