• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.11
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• pp.550-556
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• 2001

The computerized cardiac analysis system, which acquires and analyzes the electrical activation signal propagating along the surface of the heart, is indispensible equipment for the open heart surgery and electrical cardiac study. In this paper, the design requirement and the electrical circuit analysis are performed to construct the multi-channel cardiac activation pre-amplifier necessary for a signal conditioning circuit. The general 64 channel configuration is expanded into 128 channels to enhance the spatial resolution on the mapped surface of the heart. The 128 channels pre-amplifier consists of input circuit, differential amplifier, right leg driven circuit and isolation part. It has distinct features; high voltage protection, leakage current limitation, isolation and the maximization of common mode rejection ratio with respect to the half-cell potential difference due to different electrode materials. The final pre-amplifier circuit is assembled with 8 boards, each of which composing of 16 channels.

• Journal of Biomedical Engineering Research
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• v.26 no.4
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• pp.215-221
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• 2005

We describe the development of a prototype multi-channel electrical impedance tomography (EIT) system. The EIT system can be equipped with either a single-ended current source or a balanced current source. Each current source can inject current between any chosen pair of electrodes. In order to reduce the data acquisition time, we implemented multiple digital voltmeters simultaneously acquiring and demodulating voltage signals. Each voltmeter measures a differential voltage between a fixed pair of adjacent electrodes. All voltmeters are configured in a radially symmetric architecture to optimize the routing of wires and minimize cross-talks. To maximize the signal-to-noise ratio, we implemented techniques such as digital waveform generation, Howland current pump circuit with a generalized impedance converter, digital phase-sensitive demodulation, tri-axial cables with both grounded and driven shields, and others. The performance of the EIT system was evaluated in terms of common-mode rejection ratio, signal-to-noise ratio, and reciprocity error. Future design of a more innovative EIT system including battery operation, miniaturization, and wireless techniques is suggested.

• Journal of Biomedical Engineering Research
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• v.20 no.2
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• pp.205-212
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• 1999

When we want to observe and record a patient's EEG in an operating room, the operation of electrosurgical unit(ESU) causes undesirable artifacts with high frequency and high voltage. These artifacts make the amplifiers of the conventional EEG system saturated and prevent the system from measuring the EEG signal. This paper describes a high-performance bipolar EEG amplifier for a CSA (compressed spectral array ) system with reduced ESU artifacts. The designed EEG amplifier uses a balanced filter to reduce the ESU artifacts, and isolates the power supply and the signal source of the preamplifier from the ground to cut off the current from the ESU to the amplifier ground. To cancel the common mode noise in high frequency, a high CMRR(common mode rejection ratio) diffferential amplifier is used. Since the developed bipolar EEG amplifier shows high gain, low noise, high CMRR, high input impedance, and low thermal drift, it is possible to observe and record more clean EEG signals in spite of ESU operation. Therefore the amplifier may be applicable to a high-fidelity CSA system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.10
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• pp.1169-1176
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• 2010

The RF front-end for L1/L2 dual-band Global Positioning System(GPS) receiver is presented in this paper. The RF front-end(down-converter) using low IF architecture consists of a wideband low noise amplifier(LNA), a current mode logic(CML) frequency divider and a I/Q down-conversion mixer with a poly-phase filter for image rejection. The current bleeding technique is used in the LNA and mixer to obtain the high gain and solve the head-room problem. The common drain feedback is adopted for low noise amplifier to achieve the wideband input matching without inductors. The fabricated RF front-end using $0.18{\mu}m$ CMOS process shows a gain of 38 dB for L1 and 41 dB for L2 band. The measured IIP3 is -29 dBm in L1 band and -33 dBm in L2 band, The input return loss is less than -10 dB from 50 MHz to 3 GHz. The measured noise figure(NF) is 3.81 dB for L1 band and 3.71 dB for L2 band. The image rejection ratio is 36.5 dB. The chip size of RF front end is $1.2{\times}1.35mm^2$.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.5
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• pp.15-18
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• 2013

This paper presents an analog front-end for electroencephalogram(EEG) signal processing. Since EEG signals are typically weak and located at very low frequencies, it is imperative to implement an amplifier with high gain, high common-mode rejection ratio(CMRR) and good noise immunity at very low frequencies. The analog front-end of this paper consists of a programmable-gain instrumentation amplifier and a band-pass filter. A frequency chopping technique is employed to remove the low-frequency noise. The circuits were fabricated in 0.18um CMOS technology and measurements showed that the analog front-end has the maximum gain of 60dB and >100dB CMRR over the programmable gain range.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.4
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• pp.300-308
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• 2010

This paper describes the development of a low-power electrocardiogram (ECG) touch sensor intended for the use with two dry metal electrodes. An equivalent ECG extraction circuit model encountered in a ground-free two-electrode configuration is investigated for an optimal sensor read-out circuit design criteria. From the equivalent circuit model, (1) maximum sensor resolution is derived based on the electrode's background thermal noise, which originates from high electrode-skin contact impedance, together with the input referred noise of instrumentation amplifier (IA), (2) 60 Hz electrostatic coupling from mains and motion artifact are also considered to determine minimum requirement of common mode rejection ratio (CMRR) and input impedance of IA. A dedicated ECG read-out front end incorporating chopping scheme is introduced to provide an input referred circuit noise of 1.3 ${\mu}V_{rms}$ over 0.5 Hz ~ 200 Hz, CMRR of IA > 100 dB, sensor resolution of 7 bits, and dissipating only 36 ${\mu}W$. Together with 8 bits synchronous successive approximation register (SAR) ADC, the sensor IC chip is implemented in 0.18 ${\mu}m$ CMOS technology and integrated on a 5 cm $\times$ 8 cm PCB with two copper patterned electrodes. With the help of proposed touch sensor, ECG signal containing QRS complex and P, T waves are successfully extracted by simply touching the electrodes with two thumbs.

• The Bulletin of The Korean Astronomical Society
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• v.43 no.1
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• pp.40.1-40.1
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• 2018

외계행성 탐색시스템 18k 모자이크 CCD 카메라는 4개의 9k CCD로 구성되며 총 32개 채널의 영상영역과 리드아웃 회로를 가진다. 관측 영상에는 각 영상영역에 대한 오버스캔(overscan) 영역이 포함되는데, 영상 신호에 의한 오버스캔 영역의 바이어스(bias) 교란을 최소화하기 위해 리드아웃 회로의 인버팅 앰프에 대한 Common Mode Rejection Ratio(CMRR)를 미세 조정하였다. 그 결과 세 사이트의 평균 CMRR이 55 dB에서 73 dB로 향상되었고, 기존에는 영상 신호에 따른 오버스캔 바이어스 레벨의 선형적 관계가 약 2/1,000의 기울기를 가졌으나 조정 후에는 약 2/10,000로 바이어스 오차가 줄어들었다. CCD 리드아웃 회로의 미세조정과 클락(clock) 개선을 통해 물결무늬 잡음 제거 및 읽기 잡음 감소가 이루어졌으며, 향후의 추가적인 바이어스 안정화와 크로스톡 개선 방안이 검토되고 있다. 카메라 전자부 조정 과정 및 결과와 더불어, 카메라 듀어와 부대장비 유지보수, Polycold CryoTiger 냉각기 운영 및 개선 관련 노하우도 함께 발표한다.

• Journal of Biomedical Engineering Research
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• v.32 no.1
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• pp.45-54
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• 2011

Cuff electrodes have a benefit for chronic electroneurogram(ENG) recording while minimizing nerve damage. However, the ENG signals are usually contaminated by electromyogram(EMG) activity from the surrounding muscle, the thermal noise generated within the source resistance, and the electric noise generated primarily at the first stage of the amplifier. This paper proposes a new cuff electrode to reduce the interference of EMG signals. An additional middle electrode was placed at the center of cuff electrode. As a result, the proposed cuff electrode achieved a higher signal-to-interference ratio compared to the conventional tripolar cuff. The cuff electrode was then assembled together with closure, headstage, and hermetic case including electronic circuits. This paper also presents a lownoise amplifier system to improve signal-to-noise ratio. The circuit was designed based on the noise analysis to minimize the electronic noise. The result shows that the total noise of the amplifier was below $1{\mu}V_{rms}$ for a cuff impedance of $1\;k{\Omega}$ and the common-mode rejection ratio was 115 dB at 1 kHz. In the current study, the performance of nerve cuff electrode system was evaluated by monitoring afferent nerve signals under mechanical stimuli in a rat animal model.

• Progress in Medical Physics
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• v.13 no.3
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• pp.156-162
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• 2002

In this study, we attempted in preparing high precision EEG measuring equipment. To measure EEG in high efficiency, pre-amplifier should get high performance common mode rejection ratio. Also, separation amplifier is essential to eliminate common line noise. So, our study were pointed at elevating the efficiency of eliminating noise, user safety and low noise characteristics. Prepared high precision pre-amplifier for EEG was A/D converted to automatically classify $\alpha$ wave, $\beta$ wave and $\theta$ wave. And converted data were Fast Fourier Transformed with real time DSP (Digital Signal Processing). Clinical demonstrations were carried out with healthy students, aged between 20 to 26 who has no histories of illness. To recognize the efficiency of the EEG, prepared EEG were used with MS equipment in low stimulated state and high stimulated state. Then, we studied at the effect of sensitivity on brain wave. From this study, it is known that our EEG equipment is efficient in sensitivity evaluation and suitable stimulations for each psychological state are required.

• ETRI Journal
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• v.38 no.5
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• pp.981-987
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• 2016

We present a cost-effective dual polarization quadrature phase-shift coherent receiver module using a silica planar lightwave circuit (PLC) hybrid assembly. Two polarization beam splitters and two $90^{\circ}$ optical hybrids are monolithically integrated in one silica PLC chip with an index contrast of $2%-{\Delta}$. Two four-channel spot-size converter integrated waveguide-photodetector (PD) arrays are bonded on PD carriers for transverse-electric/transverse-magnetic polarization, and butt-coupled to a polished facet of the PLC using a simple chip-to-chip bonding method. Instead of a ceramic sub-mount, a low-cost printed circuit board is applied in the module. A stepped CuW block is used to dissipate the heat generated from trans-impedance amplifiers and to vertically align RF transmission lines. The fabricated coherent receiver shows a 3-dB bandwidth of 26 GHz and a common mode rejection ratio of 16 dB at 22 GHz for a local oscillator optical input. A bit error rate of $8.3{\times}10^{-11}$ is achieved at a 112-Gbps back-to-back transmission with off-line digital signal processing.