• Title/Summary/Keyword: Common Mode Noise

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Design of the RF Front-end for L1/L2 Dual-Band GPS Receiver (L1/L2 이중-밴드 GPS 수신기용 RF 전단부 설계)

  • Kim, Hyeon-Deok;Oh, Tae-Soo;Jeon, Jae-Wan;Kim, Seong-Kyun;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.10
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    • pp.1169-1176
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    • 2010
  • The RF front-end for L1/L2 dual-band Global Positioning System(GPS) receiver is presented in this paper. The RF front-end(down-converter) using low IF architecture consists of a wideband low noise amplifier(LNA), a current mode logic(CML) frequency divider and a I/Q down-conversion mixer with a poly-phase filter for image rejection. The current bleeding technique is used in the LNA and mixer to obtain the high gain and solve the head-room problem. The common drain feedback is adopted for low noise amplifier to achieve the wideband input matching without inductors. The fabricated RF front-end using $0.18{\mu}m$ CMOS process shows a gain of 38 dB for L1 and 41 dB for L2 band. The measured IIP3 is -29 dBm in L1 band and -33 dBm in L2 band, The input return loss is less than -10 dB from 50 MHz to 3 GHz. The measured noise figure(NF) is 3.81 dB for L1 band and 3.71 dB for L2 band. The image rejection ratio is 36.5 dB. The chip size of RF front end is $1.2{\times}1.35mm^2$.

Neutral Current Compensation Using Single Phase Active Power Filter in Three-Phase Four-Wire Electric Distribution Systems (3상 4선식 배전계통에서 단상 능동필터를 이용한 중성선 전류의 보상)

  • Choi, See-Young;Kim, Byung-Seob;Song, Jong-Hwhan
    • Proceedings of the KIEE Conference
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    • 2002.07b
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    • pp.1046-1048
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    • 2002
  • The increase of triplen harmonics in three-phase four-wire systems leads to overloaded neutral conductor, common-mode noise problems, derating of transformers, and so on. Various compensator has been designed to prevent the problems associated with the triplen harmonics. But these can not protect distribution system effectively because the triplen harmonic source is distributed extensively and distribution system type is diverse. This paper explain the operation and installation of single phase active power filter to eliminate triplen harmonics and then it is verified by simulation.

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Sensorless Control Method of the BLDC Motor Without Neutral Point (중성점을 사용하지 않는 BLDC 전동기 센서리스 제어 기법)

  • Sim, Kwang-Ryeol;An, Jeong-Ryeol
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.61 no.3
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    • pp.111-115
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    • 2012
  • Generally, brushless DC motor(BLDCM) driving system uses hall sensors or encoders as the mechanical position or speed sensor. It is necessary to achieve the informations of rotor position for driving trapezoidal type brushless DC motor without any position sensor. In this paper, the commutation signals are obtained without the motor neutral voltage, multistage analog filters, A/D converters, or the complex digital phase shift circuits which are indispensable in the conventional sensorless control algorithms. In the proposed method, in stead of detecting the zero crossing point of the nonexcited motor back electromagnetic force for the average motor terminal to neutral voltage, the commutation signal are extracted directly from the specific average line to line voltage with low-pass filter, adder and comparators circuit. In contrast to conventional methods, the neutral voltage is not need; therefore, the commutation signals are insensitive to the common mode noise. Moreover, the complex phase shift circuit can be eliminated. The effectiveness of the proposed method is verified through simulation results.

Select Power Device for Reduction of Switching loss In Single Phase Grid Connected Inverter (Switch loss 저감을 위한 단상인버터 Power Device 선정)

  • Lee, Jong-Uk;Lee, Seung-Ju;Kim, Hag-Wone;Cho, Kwan-Yuhl
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.165-166
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    • 2016
  • 본 논문에서는 Common-Mode Noise가 저감된 계통연계형 단상인버터의 파워소자선정에 따른 스위칭 손실 저감을 제안한다. 풀브리지 회로에서 상용전원 레퍼런스 주파수로 상보적인 스위칭 신호를 주는 PWM_1구간에는 비교적 천천히 스위칭하기 때문에 컨덕션 loss가 적은 IGBT를 사용하며, 보다 빠른 스위칭 주파수로 동작하는 PWM_2구간에서는 Switching loss가 적은 MOSFET을 사용하여 전체적인 스위치에서 발생되는 손실을 저감한다.

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Bipolar EEG Amplifier for CSA System (CSA 시스템을 위한 뇌파양극증폭기)

  • Park, S.H.;Yoo, S.K.;Kim, S.H.;Kim, D.J.;Youn, H.L.;Kim, N.H.
    • Proceedings of the KOSOMBE Conference
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    • v.1997 no.05
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    • pp.349-352
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    • 1997
  • The EEG amplifier satisfies high gain, high common mode rejection ratio(CMRR), high input impedance, low thermal drift, low noise and good d.c. performance. The Bipolar amplifier of this paper safisfies above categories and aim at minimization of the ESU(electric surgical unit) interference.

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Performance of Distributed MISO Systems Using Cooperative Transmission with Antenna Selection

  • Park, Jong-Hyun;Kim, Jae-Won;Sung, Won-Jin
    • Journal of Communications and Networks
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    • v.10 no.2
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    • pp.163-174
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    • 2008
  • Performance of downlink transmission strategies exploiting cooperative transmit diversity is investigated for distributed multiple-input single-output (MISO) systems, for which geographically distributed remote antennas (RA) in a cell can either communicate with distinct mobile stations (MS) or cooperate for a common MS. Statistical characteristics in terms of the signal-to-interference-plus-noise ratio (SINR) and the achievable capacity are analyzed for both cooperative and non-cooperative transmission schemes, and the preferred mode of operation for given channel conditions is presented using the analysis result. In particular, we determine an exact amount of the maximum achievable gain in capacity when RAs for signal transmission are selected based on the instantaneous channel condition, by deriving a general expression for the SINR of such antenna selection based transmission. For important special cases of selecting a single RA for non-cooperative transmission and selecting two RAs for cooperative transmission among three RAs surrounding the MS, closed-form formulas are presented for the SINR and capacity distributions.

3-10.6GHz UWB LNA Design in CMOS 0.18um Process (CMOS 0.18um 공정을 이용한 3.1-10.6 GHz UWB LNA 설계)

  • Jung, Ha-Yong;Hwang, In-Yong;Park, Chan-Hyeong
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.539-540
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    • 2008
  • This paper presents an ultra-wideband (UWB) CMOS low noise amplifier (LNA) topology that operates in 3.1-10.6GHz band. The common gate structure provides wideband input matching and flattens the passband gain. The proposed UWB amplifier is implemented in 0.18 um CMOS technology for lower band operation mode. Simulation shows a minimum NF of 2.35 dB, a power gain of $18.3{\sim}20\;dB$, better than -10 dB of input and output matching, while consuming 16.4 mW.

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Pull-in Characteristics of Delay Switching Phase-Locked Loop (Delay Switching PLL의 Pull-in 특성)

  • 장병화;김재균
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.15 no.5
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    • pp.13-18
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    • 1978
  • A delay switching PLL (DSPLL) is proposed for improvement of the frequency acquisition Performance (pull-in range) while keeping a narrow bandwidth LPF. It has, between the phase detector and the LPF, just a simple RC delay circuit, a switch and another phase detector controlling the switching time. For the common second order PLL, the pull-in capability of the DSPLL is analyzed approximately, without considering additive white noise effect, and verified experimentally. It is shown that the delay switching extends the pull-in range significantly, as much as a half of lock-range. At the phase tracking mode, the delay switching does not function, to make the DSPLL be a normal PLL.

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A Multi-channel CMOS Feedforward Transimpedance Amplifier Array for LADAR Systems (라이다 시스템용 멀티채널 CMOS 피드포워드 트랜스임피던스 증폭기 어레이)

  • Kim, Seung-Hoon;Park, Sung Min
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.12
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    • pp.1737-1741
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    • 2015
  • A multi-channel CMOS transimpedance amplifier(TIA) array is realized in a $0.18-{\mu}m$ CMOS technology for the applications of panoramic scan LADAR systems. Each channel consists of a PIN photodiode and a feed-forward TIA that exploits an inverter input stage followed by a feed-forward common-source amplifier so as to achieve lower noise and higher gain than a conventional voltage-mode inverter TIA. Measured results demonstrate that each channel achieves $76-dB{\Omega}$ transimpedance gain, 720-MHz bandwidth, and -20.5-dBm sensitivity for $10^{-9}$ BER. Also, a single channel dissipates the power dissipation of 30 mW from a single 1.8-V supply, and shows less than -33-dB crosstalk between adjacent channels.

Loss Reduction Method of Single-phase Grid-connect Inverters with Synchronous Rectification (동기 정류 방식을 적용한 계통 연계형 단상 인버터의 손실 저감 방법)

  • Lee, Seung-Tae;Lee, Seung-Ju;Kim, Hag-Wone;Cho, Kwan-Yuhl
    • Proceedings of the KIPE Conference
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    • 2016.11a
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    • pp.216-217
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    • 2016
  • 본 논문에서는 Common Mode Noise가 저감된 계통연계형 단상인버터에서 파워 소자의 도통손실을 줄일 수 있는 방법을 제안한다. 제안하는 방법은 단상인버터의 (+)양의 구간과 (-)음의 구간의 전류 회생모드 시 MOSFET 소자를 turn-on 시키는 동기 정류 방식을 사용하여 손실을 저감한다. 제안한 방법의 효용성을 PSIM 모의해석을 통하여 입증 하였다.

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