• Title/Summary/Keyword: Common Electrode

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Reducing of cross-talk by patterning of common electrode in the patterned vertical alignment (PVA) mode (PVA모드에서 공통 전극 패턴을 통한 전기장 간섭의 감소 효과)

  • Jeon, Yeon-Mun;Kim, Youn-Sik;Hwang, Seong-Jin;Lee, Seung-Hee;Lyu, Jae-Jin;Kim, Kyeong-Hyeon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.43-44
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    • 2006
  • We have studied electro-optical characteristics and stability of liquid crystal director depending on electrode patterning of common electrode on top substrate in patterned vertical alignment (PVA) mode. In the present studies, new type of common electrode pattern was suggested to enhance a dark state by reducing interference area due to data signal. According to the simulation result, PVA device with new common electrode pattern contributed to Improvement of an aperture ratio.

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Electrical characteristics and pulse memory operation of 3-electrode DC-PDP (3전극 직류형 PDP의 전기적 특성과 펄스 메모리 구동)

  • 명대진;손일헌
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.7
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    • pp.32-39
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    • 1998
  • This paper presents the experimental results on the 3-electrode DC-PDP which has a common electrode to improve the PDP life cycle. The measured DC characteristic proves the effectiveness of common electrode absorbing about half of discharge currents. The waveforms for pulse memory operation of3-electrode PDP without crosstalk could also be determined from the I-V characteristics. The pulse memory drives of 8*8 cell array show the frequency response fo memory margin and the luminance efficiency of 3-electrode PDP are quite different from genrally known characteristics of 2-electrode DC-PDP.

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A study on plasma-assisted patterning and doubly deposited cathode for improvement of AMOLED common electrode IR drop

  • Yang, Ji-Hoon;Kwak, Jeong-Hun;Lee, Chang-Hee;Hong, Yong-Taek
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.481-484
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    • 2008
  • In order to reduce IR drop through common electrode in AMOLED, we propose a novel method to form electrical contact between highly-conductive bus lines and common electrode by using a plasma-assisted patterning of OLED layers and double deposition of the common electrode. Plasma-assisted patterning effects on OLED performance and degradation have been investigated. This patterning method caused turn-on voltage decrease, current flow increase at the same applied OLED voltages, quantum efficiency decrease, and rapid degradation at early stage during the lifetime test. However, comparable 70% luminance lifetime were obtained for both patterned and non-patterned OLEDs.

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Design of Crosstalk Compensation Circuit in TFT-LCDs (박막트랜지스터 액정표시소자의 화소간섭 보상회로설계)

  • 정윤철;박종철;김이섭
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.11
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    • pp.1374-1382
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    • 1995
  • In TFT-LCDs, as the display size area becomes larger, and the resolution higher, we have to consider the image degradation effects due to the incorporation of the TFT-LCD parameters such as the data-line resistance, the common electrode resistance, the data-line to common parasitic capacitance, and the output characteristics of driver ICs. One of the degradation effects is crosstalk resulting from the coupling between the source bus-line and common electrode. Since a source signal which represents a large number of display data is supposed to vary frequently, the common signal level is affected through the coupling effect, resulting in the degradation of nearby pixel drive signals. Therefore, we proposed a method to compensate for this source-common electrode coupling effect, we also designed and experimented the feasibility of our crosstalk compensation circuit in the actual TFT-LCD. We saw that the newly designed compensation circuit greatly reduced the crosstalk in display pattern image.

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A Study on comnon-mode-driven shield for capacitive coupling active electrode (용량성 결합 능동 전극의 공통 모드 구동 차폐)

  • Lim, Yong-Gyu
    • Journal of the Institute of Convergence Signal Processing
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    • v.13 no.4
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    • pp.201-206
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    • 2012
  • The indirect-contact ECG measurement is a newly developed method for unconstrained and nonconscious measurement in daily life. This study introduced a new method of electrode circuit design developed for reducing the 60Hz power line noise observed at the indirect-contact ECG measurement. By the introduced common-mode-driven shielding, the voltage of the electrical shield surrounding the capacitive coupling electrode is maintained at the same as the common mode voltage. Though the method cannot reduce the level of common mode voltage itself, that reduces effectively the differential mode noise converted from the common mode voltage by the difference of cloth impedance between the two capacitive coupling electrode. The experiment results using the actual indirect-contact ECG showed that the 60Hz power line noise was reduced remarkably though the reduction ratio was smaller than the expected by the theory. Especially, the reduction ratio became large for the large difference of cloth. It is expected that the introduced method is useful for reducing the power line noise under condition of poor electrical grounding.

Simulations of Effects of Common Electrode Voltage Distributions on Pixel Characteristics in TFT -LCD (TFT-LCD 공통 전극 전압 분포에 따른 화소 특성 시뮬레이션)

  • Kim, Tae-Hyung;Park, Jae-Woo;Kim, Jin-Hong;Choi, Jong-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04a
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    • pp.165-168
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    • 2000
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color fiat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. In addition, PDAST can estimate voltage distributions in common electrode which can affect pixel voltage and feed-through voltage. Since PDAST can simulate the gate, data and the pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of common electrode voltage can be effectively analyzed. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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CMI Tolerant Readout IC for Two-Electrode ECG Recording (공통-모드 간섭 (CMI)에 강인한 2-전극 기반 심전도 계측 회로)

  • Sanggyun Kang;Kyeongsik Nam;Hyoungho Ko
    • Journal of Sensor Science and Technology
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    • v.32 no.6
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    • pp.432-440
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    • 2023
  • This study introduces an efficient readout circuit designed for two-electrode electrocardiogram (ECG) recording, characterized by its low-noise and low-power consumption attributes. Unlike its three-electrode counterpart, the two-electrode ECG is susceptible to common-mode interference (CMI), causing signal distortion. To counter this, the proposed circuit integrates a common-mode charge pump (CMCP) with a window comparator, allowing for a CMI tolerance of up to 20 VPP. The CMCP design prevents the activation of electrostatic discharge (ESD) diodes and becomes operational only when CMI surpasses the predetermined range set by the window comparator. This ensures power efficiency and minimizes intermodulation distortion (IMD) arising from switching noise. To maintain ECG signal accuracy, the circuit employs a chopper-stabilized instrumentation amplifier (IA) for low-noise attributes, and to achieve high input impedance, it incorporates a floating high-pass filter (HPF) and a current-feedback instrumentation amplifier (CFIA). This comprehensive design integrates various components, including a QRS peak detector and serial peripheral interface (SPI), into a single 0.18-㎛ CMOS chip occupying 0.54 mm2. Experimental evaluations showed a 0.59 µVRMS noise level within a 1-100 Hz bandwidth and a power draw of 23.83 µW at 1.8 V.

Effects of Ramp Type-Common Electrode Bias on Reset Discharge Characteristics in AC-PDP

  • Park, Choon-Sang;Cho, Byung-Gwon;Tae, Heung-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1258-1261
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    • 2005
  • The ramp type bias voltage applied to the common electrode during a reset-period is newly proposed to lower the background luminance and to improve the address discharge characteristics in AC-PDP. The positive ramp bias voltage is applied during the ramp-up period, whereas the negative ramp bias voltage is applied during the ramp-down period. The effects of the voltage slopes in both the positive and negative ramp bias voltages on the background luminance and address voltage characteristics are examined intensively. It is observed that the optimized positive and negative ramp bias voltages applied to the common electrode during the ramp-period can lower the background luminance and also enhance the address discharge characteristics of the AC-PDP.

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A dense local block CNT-FEL BLU with common gate structure

  • Jeong, Jin-Woo;Kim, Dong-Il;Kang, Jun-Tae;Kim, Jae-Woo;Song, Yoon-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.148-150
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    • 2009
  • We have developed 15 inch, 130 blocks local dimming FEL using printed CNT emitters, in which multiple FE blocks were built with a common gate electrode. Cathode electrode formed by the double-metal technique, in which an insulator is interposed between the addressing bus and cathode electrode.

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