• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.5
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• pp.32-38
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• 2009

FTT(Fast Fourier Transform) processor is widely used in OFDM(Orthogonal Frequency Division Multiplesing) system. Because of the increased requirement of mobility and bandwidth in the OFDM system, they need large point FTT processor. Since the size of memory which stores the twiddle factor coefficients are proportional to the N of FFT size, we propose a new method by which we can reduce the size of the coefficient memory. In the proposed method, we exploit a counter and unsigned multiplier to generate the twiddle factor indices. To verify the proposed algorithm, we design TFCGs(Twiddle Factor Coefficient Generator) for 1024pint FFTs with R2SDF(Radix-2 Single-Path Delay Feedback), $R2^3SDF,\;R2^3SDF,\;R2^4SDF$ architectures. The size of ROM is reduced to 1/8N. In the case of $R2^4SDF$ architecture, the area and the power are reduced by 57.9%, 57.5% respectively.

• 한국방재학회:학술대회논문집
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• 2007.02a
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• pp.29-32
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• 2007

Damages induced typhoons have been increased and super-typhoons have occurred frequently. In our study, we propose a storm risk assessment technique based on CFD for the industrial structures and equipment located in the coastal regions. Inflow wind speeds are obtained through the information of geography and meteorology in considering regions before pressures of wind-environment and structures corresponding to different winds are calculated with wind speed multiplier and pressure coefficient. The results are applicable to evaluate a warning wind speed or regions vulnerable to debris in a considering region and to examine the safety of structures and their exteriors.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.3
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• pp.270-276
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• 2018

This paper presents a low area 256-point pipelined FFT architecture, especially for IEEE 802.16a WiMAX systems. Radix-24 algorithm and single-path delay feedback (SDF) architecture are adopted in the design to reduce the complexity of twiddle factor multiplication. A new cascade canonical signed digit (CSD) complex multipliers are proposed for twiddle factor multiplication, which has lower area and less power consumption than conventional complex multipliers composed of 4 multipliers and 2 adders. Also, the proposed cascade CSD multipliers can remove look-up table for storing coefficient of twiddle factors. In hardware implementation with Cyclone 10LP FPGA, it is shown that the proposed FFT design method achieves about 62% reduction in gate count and 64% memory reduction compared with the previous schemes.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.12
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• pp.584-589
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• 2001

This paper presents an implementation method of multi-channel synchronized phasor measurement device, which is based on the ASIC implementation of the sliding-DFT. A time-shared multiplier structure is proposed to minimize the number of gates required for the implementation. The design is verified by the timing simulation of its operation. The effect of coefficient approximation in the recursive implementation of the sliding-DFT is analytically derived and verified with the computer simulations.

• Journal of computational fluids engineering
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• v.14 no.4
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• pp.101-108
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• 2009

We present a new finite-element scheme for direct numerical simulation of particle suspensions in simple shear flow of a viscoelastic fluid in 3D. The sliding tri-periodic representative cell concept has been combined with DEVSS/DG finite element scheme by introducing constraint equations along the domain boundary. Rigid body motion of the freely suspended particle is described by the rigid-shell description and implemented by Lagrangian multipliers on particle boundaries. We present the bulk rheology of suspensions through the numerical examples of single-, two- and many-particle problems, which represent a large number of such systems in simple shear flow. We report the steady bulk viscosity and the first normal stress coefficient, which show shear-thickening behavior for both properties.

• Geomechanics and Engineering
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• v.31 no.5
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• pp.505-518
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• 2022

This study introduces soil resistance multipliers at locations encompassed by the zone of influence of the helix plate to consider the added lateral resistance provided to the helical pile. The zone of influence of a helix plate is a function of its diameter and serves as a boundary condition for the modified soil resistance springs. The concept is based on implementing p-multipliers as a reduction factor for piles in group action. The application of modified p-y springs in the analysis of helical piles allows for better characterization and understanding of the lateral behavior of helical piles, which will help further the development of design methods. To execute the proposed method, a finite difference program, HPCap (Helical Pile Capacity), was developed by the authors using Matlab. The program computes the deflection, shear force, bending moment, and soil resistance of the helical pile and allows the user to freely input the value of the zone of influence and Ω (a coefficient that affects the value of the p-multiplier). Results from ten full-scale lateral load tests on helical piles embedded at depths of 3.0 m with varying shaft diameters, shaft thicknesses, and helix configurations were analyzed to determine the zone of influence and the magnitude of the p-multipliers. The analysis determined that the value of the p-multipliers is influenced by the ratio between the pile embedment length and the shaft diameter (D_p), the effective helix diameter (D_h-D_p), and the zone of influence. Furthermore, the zone of influence is recommended to be 1.75 times the helix diameter (D_h). Using the numerical analysis method presented in this study, the predicted deflections of the various helical pile cases showed good agreement with the observed field test results.

• Journal of the Korean GEO-environmental Society
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• v.11 no.3
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• pp.17-22
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• 2010

This paper analyzed the characteristics of p-multiplier and the load distribution of H-pile group installed in weathered soil under horizontal loading. The results of this study conducted in pile arrangement ($2{\times}3$, $3{\times}3$), the pile center to center spacing (2D, 4D, 6D), and soil density (relative density: 40%, 80%) were drawn as follows. As to the average horizontal loading applied to each pile in pile groups, the fewer number of piles was, the larger average horizontal resistance became. As the result of analysis on p-y curves of single piles and pile groups according to the pile distance and the soil density, as the pile spacing was increased from 2D to 6D, the interaction coefficients of pile group showed 0.85~0.94 (piles in the front row), 0.57~0.79 (piles in the middle row), and 0.60~0.71 (piles in the rear row) in the loose ground and showed 0.76~0.82 (piles in the front row), 0.58~0.73 (piles in the middle row), and 0.53~0.70 (piles in the rear row) in the dense ground. As above, the wider pile distance was, the larger interaction coefficient value was shown among piles. In addition, piles in the front row showed bigger interaction coefficients than that of piles in the middle and back row.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.49-56
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• 1998

In this paper, a design of bias circuit in temperature independent voltage detect circuit is proposed. In order to realize this intention, we are used the differences in temperature coefficient of thermal voltage, resistor and transistor forward voltage(V$\sub$BE/) which is consisted in comparator. That is, It is realized by compensating the difference of temperature coefficient due to using components with each different temperature coefficient. As well, reference voltage of the circuit is accomplished by the difference of transistor forward voltage($\Delta$V$\sub$BE/) in comparator. In using reference voltage, resistor and V$\sub$BE/ Multiplier, we can design detect voltage of the circuit. In order to test operation of proposing circuit, we manufactured IC. Then, we measured operating characteristics and capability of the circuit by using HP4145B and temperature chamber. The result, we could obtain the good variation of temperature from -0.01 %/$^{\circ}C$ to -0.025 %/$^{\circ}C$.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.39 no.6
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• pp.34-42
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• 2002

In this paper, we propose a temperature independent the detective voltage source in voltage detector. The value of a detective voltage source is designed to become m times of silicon bandgap voltage at zero absolute temperature. By properly choosing the temperature coefficient of diode, the temperature coefficient of a concave voltage nonlinearities generated by the ${\Delta}V_{BE}$ section of diode between base and emitter of transistors with a different area can be summed with convex nonlinearities the $V_{BE}$ voltage to achieve the near zero temperature coefficient of the detective voltage source. We designed that the value of a detective voltage can be varied by ${\Delta}V_{BE}$, the $V_{BE}$multiplier circuit and resistor. In order to verify the performance of a proposed detective voltage source, we manufactured the voltage detector IC for 1.9V which is fabricated in $6{\mu}m$ Bipolar technology and measured the operating characteristics, the temperature coefficient of a detective voltage. To reduce the deviation of a detective voltage in the IC process step, we introduced a trimming technology, ion implantation and an isotropic etching. In manufactured IC, the detective voltage source could achieve the stable temperature coefficient of 29ppm/$^{\circ}C$ over the temperature range of -30$^{\circ}C$ to 70$^{\circ}C$. The current consumption of a voltage detector constituted by the proposed detective voltage source is $10{\mu}A$ from 1.9V-supply voltage at room temperature.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.41 no.3
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• pp.171-181
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• 2017

Two-phase cross flow exists in many shell-and-tube heat exchangers such as condensers, evaporators, and nuclear steam generators. The drag force acting on a tube bundle subjected to air/water flow is evaluated experimentally. The cylinders subjected to two-phase flow are arranged in a normal square array. The ratio of pitch to diameter is 1.35, and the diameter of the cylinder is 18 mm. The drag force along the flow direction on the tube bundles is measured to calculate the drag coefficient and the two-phase damping ratio. The two-phase damping ratios, given by the analytical model for a homogeneous two-phase flow, are compared with experimental results. The correlation factor between the frictional pressure drop and the hydraulic drag coefficient is determined from the experimental results. The factor is used to calculate the drag force analytically. It is found that with an increase in the mass flux, the drag force, and the drag coefficients are close to the results given by the homogeneous model. The result shows that the damping ratio can be calculated using the homogeneous model for bubbly flow of sufficiently large mass flux.