• JSTS:Journal of Semiconductor Technology and Science
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• 제8권1호
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• pp.85-91
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• 2008

A Boost Power Factor Correction (PFC) Converter employing Zero Voltage Switching (ZVS) based Compound Active Clamping (CAC) technique is presented in this paper. An Electro Magnetic Interference (EMI) Filer is connected at the line side of the proposed converter to suppress Electro Magnetic Interference. The proposed converter can effectively reduce the losses caused by diode reverse recovery. Both the main switch and the auxiliary switch can achieve soft switching i.e. ZVS under certain condition. The parasitic oscillation caused by the parasitic capacitance of the boost diode is eliminated. The voltage on the main switch, the auxiliary switch and the boost diode are clamped. The principle of operation, design and simulation results are presented here. A prototype of the proposed converter is built and tested for low input voltage i.e. 15V AC supply and the experimental results are obtained. The power factor at the line side of the converter and the converter efficiency are improved using the proposed technique.

• Transactions on Electrical and Electronic Materials
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• 제17권5호
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• pp.289-292
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• 2016

This paper dealt with the optimal design of a follow current disconnector for DC arresters used in electric traction vehicles. The disconnector separates the ground lead from an arrester to prevent a line-to-ground fault of an aged arrester and should not affect the operation and function such as the reference and the clamping voltage of the connected arrester. The designed disconnector is composed of a resistor, a spark gap, and a cartridge. The results showed that the sparkover voltage increased with the gap distance whereas the reference voltage was almost the same as that without the disconnector. The sparkover voltage was 3.95 kV when the gap distance was 0.5 mm. Regardless of the gap distance, the reference and the clamping voltage of the assembled disconnector with an arrester were measured to be the same as those of the arrester alone.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권8호
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• pp.392-401
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• 2001

This paper presents the single-stage high power factor AC to DC converter operated in active-clamp mode. The proposed converter is added active-clamping circuit to boost-flyback single-stage power factor corrected power supply. The active-clamping circuit limits voltage spikes, recycles the energy trapped in the leakage inductance, and provides a mechanism for achieving soft switching of the electronic switches to reduce the switching loss. The auxiliary switch of active-clamping circuit uses the same control and driver circuit as the main switch to reduce the additional cost and size. To verify the performance of the proposed converter, a 100W converter has been designed. The proposed converter gives good power factor correction, low line current harmonic distortions, and tight output voltage regulation, as used unity power factor.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.2143-2145
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• 2005

Power semicondcutor인 IGBT MOSFET, GTO, SI-Thyristor등은 높은 스위치 신뢰성과 life time, 그리고 fast repetition rate 등을 지니고 있기 때문에 medium/High voltage영역에서 스위치 사용이 대두되어 왔으나, Thyratron이나 Trigatron(Gap switch)와 비교하여 낮은 전압/전류를 스위칭하기 때문에 전통적으로 직렬연결을 통해 high voltage 영역의 스위치로 사용되어 왔다. 하지만, 직렬연결되어 있는 각각의 power semiconductor와 gate driving circuit의 on/off synchronization이 맞지 않기 때문에 부하의 급격한 변화에 따른 전압의 balance에 문제가 가장 심각하게 대두되어 왔다. 이러한 문제를 해결하기 위해서 gate driving circuit에서 제어를 해주는 방법과 power semiconductor에서 제어를 해주는 방법이 있으나 두 방식 모두 문제점이 있다. 본 논문에서는 기존의 zener clamping방식에서 벗어나 새로운 active clamping방식의 직렬연결을 제안했으며 시뮬레이션과 실험을 통해 나타난 이 결과들은 on/off transient 시 symmetry를 유지하는데 효과적이라는 것을 보여주고 있다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 전력전자학술대회 논문집
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• pp.319-322
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• 1998

In this paper we further propose to add a very simple regenerative clamping circuit to SSIPP to reduce the voltage stress and to recycle the energy trapped in the leakage inductance of the isolation transformer, thus eliminating the need for a lossy snubber circuit. In addition, this proposed clamping circuit also provides a mechanism to reset the magnetizing current of the output transformer of SSIPP employing a Forward converter as the output stage. Simulations and experimental results are reported to verify the operation and performance of the SSIPP with regenerative clamping.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 C
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• pp.1582-1584
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• 2004

The microstructure, electrical, and clamping voltage characteristics of ZPCCY-based varistor ceramics were investigated in the sintering time range of 1${\sim}$3 h. Increasing sintering time promoted the densification, in which the average grain size and density are increased in the range of $11.4{\sim}16.0{\mu}m$ and $5.34{\sim}5.54g/cm^3$, respectively. The nonlinear exponent decresed in the range of 60${\sim}$26 and the leakage current increased in the range of $1.3{\sim}10.7{\mu}A$ with increase of sintering time. The clamping voltage ratio was less than 2 for ratio surge current of 10 A over sintering times.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 반도체 재료 센서 박막재료 전자세라믹스
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• pp.175-178
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• 2004

The microstructure, electrical, and clamping voltage characteristics of ZPCCD-based varistors were investigated at sintering time of 2 and 3 h. The average grain size and density of varistor were increased from 15.2 to 19.0 and from 5.5 to 5.6 $g/cm^3$ with sintering time, respectively. The nonlinear exponent was 65.4 for 2 h and 37.4 for 3 h, and leakage current was 0.54 ${\mu}A$ for 2 h and 0.67 ${\mu}A$ for 3 h. The dissipation factor was 0.0397 for 2 h and 0.0457 for 3 h. The clamping voltage ratio at surge current($8/20{\mu}s$) of 10~300 A was increased in the range of 1.56~2.17.

• Transactions on Electrical and Electronic Materials
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• 제16권6호
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• pp.308-311
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• 2015

V₂O₅/Mn₃O₄/Nb₂O₅ codoped zinc oxide varistor ceramics were sintered at a temperature range as low as 875~950℃. The voltage clamping characteristics of V₂O₅/Mn₃O₄/Nb₂O₅ codoped zinc oxide varistor ceramics were investigated at a pulse current range of 1~50 A. The sintering temperature had a significant effect on clamp voltage ratio, which exhibits surge protection capabilities. The varistor ceramics sintered at 875℃ exhibited the best clamping characteristics, in which the clamp voltage ratio was 2.69 at a pulse current of 50 A. The varistor ceramics sintered at 900℃ exhibited the highest electrical stability, where = 3,824 V/cm (initial 3,909 V/cm), and E_{1 mA/cm²} = 27 (initial 39) after application of a pulse current of 100 A.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.341-345
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• 2004

A high efficiency and low device stress voltage and current clamping BVS PWM asymmetrical half bridge converter is proposed in this paper. To achieve the ZVS of power switches along the wide load range, the transformer leakage inductor $L_{Ikg}$ is increased. Then, to solve the problem related to ringing in the secondary rectifier caused by the resonance between $L_{Ikg}$ and rectifier junction capacitors, the proposed converter employs a voltage and current clamping cell, which helps voltages and currents of rectifier diodes to be clamped at the output voltage and output current, respectively. Therefore, no RC-snubber for rectifier diodes is needed and a high efficiency as well as low noise output voltage can be realized. In addition, since all energy stored in $L_{Ikg}$ is transferred to the output side, the circulating energy problem can be effectively solved and duty loss does net exist. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 425W, 385-170Vdc prototype are presented.

• Journal of Power Electronics
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• 제11권4호
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• pp.499-506
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• 2011

This paper presents an interleaved active-clamping zero-voltage-switching (ZVS) forward-flyback converter without an output choke. The presented topology has two active-clamping circuits with two separated transformers. Because of the interleaved operation of the converter, the output current ripple will be reduced. The proposed converter can approximately share the total load current between the two secondaries. Therefore, the transformer copper loss and the rectifier diodes conduction loss can be decreased. The output capacitor is made of two series capacitors which reduces the peak reverse voltage of the rectifier diodes. The circuit has no output inductor and few semiconductor elements, such that the adopted circuit has a simpler structure, a lower cost and is suitable for high power density applications. A detailed analysis and the design of this new converter are described. A prototype converter has been implemented and experimental results have been recorded with an ac input voltage of 85-135Vrms, an output voltage of 12V and an output current of 16A.