• Title/Summary/Keyword: Circuit optimization

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Robust $H_{\infty}$ Controller Design for Steam Generator Water Level Control using Mixed $H_{\infty}$ Optimization Method (혼합 $H_{\infty}$ 최적화 기법을 이용한 견실 $H_{\infty}$ 증기발생기 수위제어기 설계)

  • 서성환;조희수;박홍배
    • Journal of Institute of Control, Robotics and Systems
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    • v.5 no.3
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    • pp.363-369
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    • 1999
  • In this paper, we design the robust $H_{\infty}$ controller for water level control of steam generator using a mixed $H_{\infty}$ optimization with model-matching method. Firstly we choose the desired model which has good disturbance rejection performance. Secondly we design a stabilizing controller to keep the model-matching error small and also provide sufficiently large stability margin against additive perturbations of the nominal plant. Simulation results show that proposed robust $H_{\infty}$ controller at specific power operation has satisfactory performances against the variations of load power, steam flow rate, primary circuit coolant temperature, and feedwater temperature. It can be also observed that the proposed robust $H_{\infty}$ controller exhibits better robust stability than conventional PI controller.

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Development of an Efficient Operation Method for PCB Assembly Line with 3 Gantry-Type Machines (3대의 갠트리 기계로 구성된 PCB조립라인의 최적운영 방안 연구)

  • Moon, Gee-Ju;Jeon, Moon-Gil
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.33 no.4
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    • pp.138-144
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    • 2010
  • This research deals with multiple Gantry-type assembly machines for the optimization of PCB assembly line. The automated assembly machine has 6 nozzles which can linearly move the X axis and the Y axis different from the turret type assembly machine. Each machine is optimized while considering the whole line balancing of three machines in assembly process simultaneously. Simulation models are developed using AutoMod for comparison study with single machine operation cases under various conditions such as types and total number of components to evaluate the proposed method.

A Study on Place and Route of Time Driven Optimization in the FPGA (FPGA에서 시간구동 최적화의 배치.배선에 관한 연구)

  • Kim, Hyeonho;Lee, Yonghui;Cheonhee Yi
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.04c
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    • pp.283-285
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    • 2003
  • We have developed an optimization algorithm based formulation for performing efficient time driven simultaneous place and route for FPGAS. Field programmable gate array(FPGAS) provide of drastically reducing the turn-around time for digital ICs, with a relatively small degradation in performance. For a variety of application specific Integrated circuit application, where time-to-market is most critical and the performance requirement do not mandate a custom or semicustom approach, FPGAS are an increasingly popular alternative. This has prompted a substantial amount of specialized synthesis and layout research focused on maximizing density, minimizing delay, and minimizing design time.

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A Method of Load Impedance Optimization for High Efficiency Millimeter-wave Range 2nd Harmonic Generation (밀리미터파 대역 제2고조파 고효율 생성을 위한 부하 임피던스의 최적화 방법)

  • Choi, Young-Kyu
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.8
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    • pp.1566-1571
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    • 2011
  • The objective of this paper is to present a quantitative analysis leading to the assessment of optimum terminating impedances in the design of active frequency multipliers. A brief analysis of the basic principal of the GaAs FET frequency multiplier is presented. The analysis is outlined in bias optimization and drive power determination. Utilizing the equivalent circuit model of GaAs FET, we have simulated the optimized load impedance for the maximum output of the active frequency multipliers. The C-class and reverse C-class frequency doublers have been fabricated and the load impedances have been measured. The experimental results are in good agreement with the estimated results in the simulation with the accuracy of 90%.

Virtual Path Routing Optimization in ATM Network (ATM 망의 가상경로 루팅 최적화)

  • 박구현
    • Journal of the Korean Operations Research and Management Science Society
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    • v.20 no.1
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    • pp.35-54
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    • 1995
  • Routing in ATM network is set up by combination of both virtual path routing and virtual channel routing. While virtual channel is similar concept to virtual circuit of data networks, virtual path is a special concept which is not used in traditional data networks. Virtual path can rearrange in structure and size by simply changing virtual path routing tables and giving the network the capability to eash allocate network resources according to the demand needs. This paper provides reconfiguration models of virtual path network which give the bandwidth of link and the routing path for each traffic class. The reconfiguration models are network optimization problems of multicommodity network flow type. The numerical examples are also included.

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Design of an LCL Filter employing a Symmetric Geometry and its Control in Grid-connected Inverter Applications (계통연계형 인버터에서 대칭 구조를 갖는 LCL 필터 설계 및 제어)

  • Lee, Kui-Jun;Park, Nam-Ju;Hyun, Dong-Seok
    • Proceedings of the KIPE Conference
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    • 2008.06a
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    • pp.250-252
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    • 2008
  • An inductor-capacitor-inductor (LCL) filter are widely adapted in grid-connected inverter applications. In this paper, the harmonic attenuations of the LCL filter are quantitatively analyzed, and then the design optimization of two inductance values, which are related on a cost and a size, is illustrated. Based on the design optimization, the LCL filter employing a Symmetric Geometry is proposed. Through the equivalent circuit analysis of the proposed LCL filter, the operating characteristics and validity are presented in detail. In addition, simple proportional-integral (PI) current controller suitable for the LCL Filter is designed to mitigate the resonance problem. From simulation results, it is seen that the proposed LCL filter and control method have a sufficient attenuation and stability for the high frequency distortions and load variations.

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Collision-Free Trajectory Control for Multiple Mobile Robots in Obstacle-resident Workspace Based on Neural Optimization Networks (장애물이 있는 작업공간에서 신경최적화 회로망에 의한 다중 이동로봇트의 경로제어)

  • ;Zeungnam Bien
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.39 no.4
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    • pp.403-413
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    • 1990
  • A collision free trajectory control for multiple mobile robots in obstacle-resident workspace is proposed. The proposed method is based on the concept of neural optimization network which has been applied to such problems which are too complex to be handled by traditional analytical methods, and gives good adaptibility for unpredictable environment. In this paper, the positions of the mobile robot are taken as the variables of the neural circuit and the differential equations are derived based on the performance index which is the weighted summation of the functions of the distances between the goal and current position of each robot, between each pair of robots and between the goal and current position of each robot, between each pair of robots and between obstacles and robots. Also is studied the problem of local minimum and of detour in large radius around obstacles, which is caused by inertia of mobile robots. To show the validity of the proposed method an example is illustrated by computer simulation, in which 6 mobile robots with mass and friction traverse in a workspace with 6 obstacles.

Design of Waveguide Bandpass Filters Using H-plane Step Discontinuities (도파관 H 면 계단형 불연속 구조를 이용한 대이동과 여파기의 설계)

  • Nam, S.H.;Kim, K.Y.;Yun, S.W.;Ann, C.
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.1
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    • pp.33-38
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    • 1994
  • In this paper, waveguide banpass filters using H-plane step discontinuities are designed based on the field theory analysis and optimization of the resonator lengths as well as dimensions of discontinuities, instead of the conventional synthesis method based on the equivalent circuit. The waveguide inductive obstacles introduced by H-plane step discontinuities analyzed using mode-matching method and the generalized scattering parameters are derived. Using the derived scattering parameters of the discontinuities as well as those of resonators, waveguide bandpass filters are designed through optimization method, modified Razor search method proposed by J.H.Bandler. Using this design procedures, waveguide bandpass filters are designed and tested at X-band(center frequency 10GHz) as well as Ka-band(center frequency 35GHz).

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Design of Ultra Low Power Processor for Ubiquitous Sensor Node (유비쿼터스 센서 노드를 위한 저전력 프로세서의 개발)

  • Shin, Chi-Hoon;Oh, Myeong-Hoon;Park, Kyoung;Kim, Sung-Woon
    • Proceedings of the KIEE Conference
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    • 2006.04a
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    • pp.165-167
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    • 2006
  • In this paper we present a new-generation sensor network processor which is not optimized in circuit level, but in system architecture level. The new design build on a conventional processor architecture, improving the design by focusing on application oriented specification, ISA, and micro-architectural optimization that reduce overall design size and advance energy-per-instruction. The design employs harvard architecture, 8-bit data paths, and an compact 19 bit wide RISC ISA. The design also features a unique interrupt handler which offloads periodical monitoring jobs from the main part of CPU. Our most efficient design is capable of running at 300 KHz (0.3 MIPS) while consuming only about few pJ/instruction.

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A Study of Inverter Optimization Design and Minimization Conducted EMI Noise by Customizing IPM (주문형 IPM을 통한 Inverter 최적화 설계 및 Conducted EMI 노이즈 저감에 관한 연구)

  • Cho Su Eog;Choi Cheol;Park Han Woong;Kim Cheol Woo
    • Proceedings of the KIPE Conference
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    • 2002.07a
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    • pp.542-545
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    • 2002
  • This paper deals with the optimization inverter design and minimization Conduced EMI noise by customizing IPM(Intelligent Power Module). Generally, In case of IPM, we realized that the trade-off relation between switching loss and spike voltage. Higher gate resistor causes tile lower spike voltage and the higher turn-off switching loss. But we know that the life cycle of inverter and the susceptibility of noise, so we optimized the gate resistor. Proposed method is that optimized the gate resistor suitable for the inverter and motor. The simulation and experimental results show that the spike voltage and Conduced EMI noise can be reduced without the additional circuit.

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