• Journal of the Semiconductor & Display Technology
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• v.19 no.3
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• pp.73-76
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• 2020

The physics-based compact gate leakage current noise models in nanoscale MOSFETs are developed in such a way that the models incorporate important physical effects and are suitable for circuit simulators, including QM (quantum-mechanical) effects. An emphasis on the trap-related parameters of noise models is laid to make the models adaptable to the variations in different process technologies and to make its parameters easily extractable from measured data. With the help of an accurate and generally applicable compact noise models, the compact noise models are successfully implemented into BSIM (Berkeley Short-channel IGFET Model) format. It is shown that the noise models have good agreement with measurements over the frequency, gate-source and drain-source bias ranges.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.1
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• pp.61-66
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• 2009

We have investigated the noise sensitivity of low noise amplifier (LNA) at different frequency. This noise sensitivity analysis provides insights about noise parameters and it is very beneficial for making appropriate design trade-offs. From this work, the circuit designer can choose the adequate noise parameters tolerances.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.2
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• pp.363-368
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• 2009

In the paper, we confirmed improvement Noise figure of the entire RF front-end using spiral inductor with PGS(Patterned Ground Shield) and current bleeding techniques. LNA design is to achieve simultaneous noise and input matching. Spiral inductor in input circuit of LNA inserted PGS for betterment of Q-factor. we modeling inductor using EM simulator, so compared with inductor of TSMC 0.18um. We designed and simulation the optimum structure of PGS using Taguchi's method. We confirmed enhancement of noise figure at LNA after substituted for inductor with PGS. Mixer designed using current bleeding techniques for reduced noise. We designed LNA using inductor with PGS and Mixer using current bleeding techniques, so confirmed improvement of noise figure.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2001.11b
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• pp.1120-1125
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• 2001

A new concept of piezoelectric smart panels for noise reduction in wide band frequencies is proposed and their possibility is experimentally investigated. Multi-mode damping is studied by using a newly proposed tuning method. The proposed panels are based on passive shunt damping methods. This method is based on electrical impedance model and maximizing the dissipated energy at the shunt circuit. four PZT are attached on smart panel for improving performance of transmission noise reduction. 0 prove the concept of piezoelectric smart panels, an acoustic measurement experiment was performed. The smart panels exhibit a good noise reduction in middle and high frequency ranges due to the mass effects of absorbing materials or/and the air gap. The use of piezoelectric smart panel renders noise reduction at resonance frequency. Noise reduction at multiple resonance frequencies is experimentally investigaed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.11
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• pp.1695-1699
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• 2012

This paper is proposed all digital wide-range clock and data recovery circuit. The Proposed clock data recovery circuit is possible input data rate which is suggested is wide-range that extends from 100Mb/s to 3Gb/s and used an phase error detector which can use a way of over-sampling a data by using a 1/2-rate multi-phase clock and phase rotator which is regular size per $2{\pi}$/16 and can make a phase rotation. So it could make the phase rotating in range of input data rate. Also all circuit is designed as a digital which has a specificity against a noise. This circuit is designed to 0.13um CMOS process and verified simulation to spectre tool.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.135-136
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• 2006

In this paper, isolation strategies for improving broadband circuit performance and preventing noise arising from circuit component coupling are presented. Equivalent circuit parameters, including parasitic elements, are determined for capacitor and inductor structures. The effects of the relative position of the components with regard to a ground plane are considered in the equivalent circuits. Novel meshed ground structures are investigated to determine a configuration that improves the overall circuit performance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.10a
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• pp.882-885
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• 2011

This paper presents testing and self-calibration of RF circuits using MEMS switches to identify process-related defects and out of specification circuits. We have developed a novel multi-tone dither test technique where the test stimulus is generated by modulating the RF carrier signal with a multi-tone signal generated using an Arbitrary Waveform Generator (AWG) with additive white Gaussian noise. This test stimulus is provided as input to the RF circuit and peak-to-average ratio (PAR) is measured at the output. For a faulty circuit, a significant difference is observed in the value of PAR as compared to a fault-free circuit. Simulation is performed for various circuit conditions such as fault-free as well as fault-induced and their corresponding PARs are stored in the look-up table. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.

• The Journal of Information Technology
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• v.12 no.4
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• pp.11-17
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• 2009

In this paper, frequency synthesizer for radar system is designed and developed. Optimizing the phase noise and lock time, each module is designed as two-type PLL circuit, and then the performance of PLL frequency synthesizer is compared. The experiment result shows the lock time of 70 usec, the phase noise of less then 100 dBc, the bandwidth above 500MHz.

• Proceedings of the IEEK Conference
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• 2002.06a
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• pp.435-438
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• 2002

A design of Ku-band(11.7~12.20Hz) monolithic microwave integrated circuit(MMIC) low noise block(LNB) downconverter using self oscillating mixer (SOM) for direct broadcast satellite(DBS) application is presented The proposed LNB downconverter is composed of low noise amplifier(LNA), image reject filter(IRF), SOM , low pass filter(LPF). The conversion gain is 30dB , VSn is less than 1.7: 1 and overall noise figure is less than 1.2dB.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.5
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• pp.423-432
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• 2023

With the increasing demand for mobile devices featuring multi-touch operation, extensive research is being conducted on touch screen panel (TSP) Readout ICs (ROICs) that should possess low power consumption, compact chip size, and immunity to external noise. Therefore, this paper discusses capacitive touch sensors and their readout circuits, and it introduces research trends in various circuit designs that are robust against external noise sources. The recent state-of-the-art TSP ROICs have primarily focused on minimizing the impact of parasitic capacitance (Cp) caused by thin panel thickness. The large Cp can be effectively compensated using an area-efficient current compensator and Current Conveyor (CC), while a display noise reduction scheme utilizing a noise-antenna (NA) electrode significantly improves the signal-to-noise ratio (SNR). Based on these achievements, it is expected that future TSP ROICs will be capable of stable operation with thinner and flexible Touch Screen Panels (TSPs).