• 대한전자공학회논문지TC
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• 제45권2호
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• pp.137-144
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• 2008

본 논문에서는 위상 잡음 특성을 개선하기 위하여 고조파 조절 회로를 기반으로 한 출력 정합 회로를 이용한 전압 제어 발진기를 제안하였다. 위상 잡음은 2차, 3차 고조파 모두에서 단락 임피던스를 갖는 고조파 조절 회로를 통하여 억제되었으며, 출력 정합 회로에 연결되었다. 또한 전압 제어 발진기의 위상 잡음 특성을 더욱 더 개선하기 위하여 마이크로스트립 사각 개방 루프 다중 SRR를 이용하였다. 위상 잡음 특성 개선을 위하여 높은 Q값을 갖는 공진기 대신에 고조파 조절 회로를 기반으로 한 출력 정합 회로를 이용하였기 때문에 낮은 Q값을 갖는 공진기를 통하여 넓은 주파수 조절 범위를 얻을 수 있다. 고조파 조절 회로를 기반으로 한 출력 정합 회로와 마이크로스트립 사각 개방 루프 다중 SRR를 이용한 제안된 전압 제업 발진기의 위상 잡음 특성은 주파수 조절 범위, $5.744{\sim}5.839$ GHz에서 $-127.5{\sim}-126.33$ dBc/Hz @ 100 kHz이다. 고조파 조절 회로가 없는 출력 정합 회로와 마이크로스트립 선로 공진기를 이용한 전압 제어 발진기와 비교했을 경우, 제안된 전압 제어 발진기의 위상 잡음 특성은 26.66 dB 개선되었다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2835-2838
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• 2003

We study the characteristics of oscillating in non-autonomous condition and the conducted noise generation in a RL-photocoupler circuit. This circuit may be shown a period-doubling and a chaos dynamics under any specific conditions of input circuit. But, the relationship between input signals and output signals is different according to the amplitude of driving input voltage. Then, the oscillation noise was analyzed with respect to both the frequency and the amplitude of an external ac signal and do values. The results show that the noise-induced oscillations for falling and rising cycles induced by kick-back effect in an inductor, nonlinear capacitance, nonlinear resistance and charge storage time in a diode and an LED. We also compared the simulation with the experimental results.

• 전기학회논문지
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• 제64권1호
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• pp.196-200
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• 2015

The switching noise in the power electronics of the power conversion equipment (Power Conditioning System) for large energy storage devices are generated. Since the burst-level transient noise from being generated in the power system at a higher power change process influences the control circuit of the low voltage driver circuit. Noise may cause the malfunction of the control device even if no dielectric breakdown leads to a control circuit. To overcome this, this paper proposes the installation of an additional nano-surge protection device on the power supply DC output circuit of the battery management unit.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제50권4호
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• pp.176-181
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• 2001

As the data rate between chip-to-chip gets high, the skin effect and load of pins deteriorate noise margin. With these, noise disturbances on the bus channel make it difficult for receiver circuits to read the data signal. This paper has proposed a new pre-emphasis driver circuit which achieves wide noise margin by enlarging the signal voltage range during data transition. When data is transferred from a memory chip to a controller, the output boltage of the driver circuit reaches the final values through the intermediate voltage level. The proposed driver supplies more currents applicable to a packet-based memory system, because it needs no additional control signal and realizes very small area. The circuit has been designed in a 0.18 ${\mu}m$ CMOS process, and HSPICE simulation results have shown that the data rate of 1.32 Gbps be achieved. Due to its result, the proposed driver can achieved higher speed than conventional driver by 10%.

• 전기전자학회논문지
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• 제21권3호
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• pp.264-267
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• 2017

본 논문에서는 잡음 제거 회로를 이용하여 공급 전원 제거 비를 향상시킨 LDO(Low drop-out) 레귤레이터를 제안하였다. LDO 레귤레이터 내부의 오차증폭기와 패스 트랜지스터 사이에 잡음 제거 회로를 두어 전압 라인에서 들어오는 노이즈에 패스 트랜지스터가 받는 영향을 줄일 수 있게 설계하였으며, 기존의 LDO 레귤레이터와 동일한 레귤레이션 특성을 갖도록 했다. 제안한 회로는 0.18um 공정을 사용하였고 Cadence의 Virtuoso, Spectre 시뮬레이터를 사용하였다.

• Journal of Power Electronics
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• 제2권2호
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• pp.139-145
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• 2002

Because conventional switching converters have been usually using unbalanced circuit topologies, parasitice between the drain/collertor of an active switch and frame ground through its heat sink may generate the commom-mode conducted noise. We have proposed a balanced switching converter circuit, whitch is an effective way to reduce the commom-mode converter version of the balanced switching converter was presented and the mechanism of the commom-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switch converter circuit and presents a buck-boost converter version of the blanced switching converter. The feature of common-mode niose reduction is confirmed by experimental resuits and the mechanisem of the commom-mode niose reduction is explained using equivalent circuits.

• KEPCO Journal on Electric Power and Energy
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• 제6권4호
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• pp.473-480
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• 2020

In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.

• 한국ITS학회 논문지
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• 제11권4호
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• pp.112-120
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• 2012

본 논문에서는 무선으로 비디오를 데이터 전송하여 접근하는데 필요한 스트림 시스템을 구현하여 시스템 내에서 발생하는 EMI(Electro Magnetic Interference) 잡음을 각 인터페이스, 회로 그리고 PCB(Printed Circuit Board) 상에서 주파수 대역별로 분석하였고 각각 기능 블럭에 대한 잡음 개선 방안을 제시하였다. 개선방안으로 저역통과 대역 필터링, 고속 데이터 라인들의 내층 배선, 그라운드의 최적화를 수행하였다. 구현된 시스템은 EMI 규제치 30 ~ 230[MHz]대역과 230 ~ 1000[MHz]대역에서 각각 40[dBuV/m]와 47[dBuV/m]내로 약 2 ~ 20[dB] 마진을 확보하여 잡음 개선을 하였다.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2002년도 추계학술대회논문집
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• pp.216-221
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• 2002

In this paper, the transmitted noise reduction of smart panels of which passive piezoelectric shunt damping is used, is experimentally studied. Shunt damping experiments are based on the measured electrical impedance model. A passive shunt circuit composed of inductors, and a load resistor is devised to dissipate the maximum energy into the joule heat energy. For multi-mode shunt damping, the shunt circuit is redesigned by adding a blocking circuit. Also the optimal location of the piezoelectric patch is studied by FEM in order to cause the maximum admittance from the patch for each mode of aluminum plate. In results, the transmitted sound pressure level of panels is efficiently reduced for multi-modes

• ETRI Journal
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• 제28권4호
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• pp.529-532
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• 2006

This letter describes a compact printed helical resonator and its application to a microwave oscillator circuit implemented in coplanar waveguide (CPW) technology. The high quality (Q)-factor and spurious-free characteristic of the resonator contribute to the phase noise reduction and the harmonic suppression of the resulting oscillator circuit, respectively. The designed resonator showed a loaded Q-factor of 180 in a chip area of only 40% of the corresponding miniaturized hairpin resonator without any spurious resonances. The fully planar oscillator incorporated with this resonator showed an additional phase noise reduction of 10.5 dB at a 1 MHz offset and a second harmonic suppression enhancement of 6 dB when compared to those of a conventional CPW oscillator without the planar helical resonator structure.