• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.2
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• pp.137-144
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• 2008

In this paper, a novel voltage-controlled oscillator(VCO) using the output matching network based on the harmonic control circuit is presented for improving the phase noise property. The phase noise suppression is achieved through the harmonic control circuit having the short impedances for both second-harmonic and third-harmonic components, which has been connected at the output matching network. Also, we have used the microstrip square open loop multiple split-ring resonator(OLMSRR) having the high-Q property to further reduce the phase noise of VCO. Because the output matching network based on the harmonic control circuit has been used for reducing the phase noise property instead of the High-Q resonator, we can obtain the broad tuning range by the low-Q resonator. The phase noise of the proposed VCO using the output matching network based on the harmonic control circuit and the microstrip square OLMSRR has been $-127.5{\sim}126.33$ dBc/Hz @ 100 kHz in the tuning range, $5.744{\sim}5.839$ GHz. Compared with the reference VCO using the output matching network without the harmonic control circuit and the microstrip line resonator, the phase noise property of the proposed VCO has been improved in 26.66 dB.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2835-2838
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• 2003

We study the characteristics of oscillating in non-autonomous condition and the conducted noise generation in a RL-photocoupler circuit. This circuit may be shown a period-doubling and a chaos dynamics under any specific conditions of input circuit. But, the relationship between input signals and output signals is different according to the amplitude of driving input voltage. Then, the oscillation noise was analyzed with respect to both the frequency and the amplitude of an external ac signal and do values. The results show that the noise-induced oscillations for falling and rising cycles induced by kick-back effect in an inductor, nonlinear capacitance, nonlinear resistance and charge storage time in a diode and an LED. We also compared the simulation with the experimental results.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.1
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• pp.196-200
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• 2015

The switching noise in the power electronics of the power conversion equipment (Power Conditioning System) for large energy storage devices are generated. Since the burst-level transient noise from being generated in the power system at a higher power change process influences the control circuit of the low voltage driver circuit. Noise may cause the malfunction of the control device even if no dielectric breakdown leads to a control circuit. To overcome this, this paper proposes the installation of an additional nano-surge protection device on the power supply DC output circuit of the battery management unit.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.176-181
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• 2001

As the data rate between chip-to-chip gets high, the skin effect and load of pins deteriorate noise margin. With these, noise disturbances on the bus channel make it difficult for receiver circuits to read the data signal. This paper has proposed a new pre-emphasis driver circuit which achieves wide noise margin by enlarging the signal voltage range during data transition. When data is transferred from a memory chip to a controller, the output boltage of the driver circuit reaches the final values through the intermediate voltage level. The proposed driver supplies more currents applicable to a packet-based memory system, because it needs no additional control signal and realizes very small area. The circuit has been designed in a 0.18 ${\mu}m$ CMOS process, and HSPICE simulation results have shown that the data rate of 1.32 Gbps be achieved. Due to its result, the proposed driver can achieved higher speed than conventional driver by 10%.

• Journal of IKEEE
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• v.21 no.3
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• pp.264-267
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• 2017

In this paper, A low dropout (LDO) regulator that improves the power supply rejection ratio by using a noise canceling circuit is proposed. The noise rejection circuit between the error amplifier and the pass transistor is designed to reduce the influence of the pass transistor on the noise coming from the voltage source. The LDO regulator has the same regulation characteristics as the conventional LDO regulator. The proposed circuit uses 0.18um process and Cadence's Virtuoso and Specter simulator.

• Journal of Power Electronics
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• v.2 no.2
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• pp.139-145
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• 2002

Because conventional switching converters have been usually using unbalanced circuit topologies, parasitice between the drain/collertor of an active switch and frame ground through its heat sink may generate the commom-mode conducted noise. We have proposed a balanced switching converter circuit, whitch is an effective way to reduce the commom-mode converter version of the balanced switching converter was presented and the mechanism of the commom-mode noise reduction was explained using equivalent circuits. This paper extends the concept of the balanced switch converter circuit and presents a buck-boost converter version of the blanced switching converter. The feature of common-mode niose reduction is confirmed by experimental resuits and the mechanisem of the commom-mode niose reduction is explained using equivalent circuits.

• KEPCO Journal on Electric Power and Energy
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• v.6 no.4
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• pp.473-480
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• 2020

In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.11 no.4
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• pp.112-120
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• 2012

In this paper, we manufactured the wireless video stream system after we scanned EMI(Electro Magnetic Interference)noise in the system. and then, we analysed the noise frequency in the interface, circuit and PCB(Printed Circuit Board). we suggested EMI noise reduction technique. The applied reduction method is low pass filtering, the internal layer placement for high speed video data line and optimization of the system ground condition. the manufactured system improved about 2 ~ 20[dB] margin for EMI limit 40[dBuV/m] at 30 ~ 230[MHz] and 47[dBuV/m] at 230 ~ 1000[MHz].

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2002.11b
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• pp.216-221
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• 2002

In this paper, the transmitted noise reduction of smart panels of which passive piezoelectric shunt damping is used, is experimentally studied. Shunt damping experiments are based on the measured electrical impedance model. A passive shunt circuit composed of inductors, and a load resistor is devised to dissipate the maximum energy into the joule heat energy. For multi-mode shunt damping, the shunt circuit is redesigned by adding a blocking circuit. Also the optimal location of the piezoelectric patch is studied by FEM in order to cause the maximum admittance from the patch for each mode of aluminum plate. In results, the transmitted sound pressure level of panels is efficiently reduced for multi-modes

• ETRI Journal
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• v.28 no.4
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• pp.529-532
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• 2006

This letter describes a compact printed helical resonator and its application to a microwave oscillator circuit implemented in coplanar waveguide (CPW) technology. The high quality (Q)-factor and spurious-free characteristic of the resonator contribute to the phase noise reduction and the harmonic suppression of the resulting oscillator circuit, respectively. The designed resonator showed a loaded Q-factor of 180 in a chip area of only 40% of the corresponding miniaturized hairpin resonator without any spurious resonances. The fully planar oscillator incorporated with this resonator showed an additional phase noise reduction of 10.5 dB at a 1 MHz offset and a second harmonic suppression enhancement of 6 dB when compared to those of a conventional CPW oscillator without the planar helical resonator structure.