• 제어로봇시스템학회:학술대회논문집
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• 1991.10a
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• pp.962-967
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• 1991

A counter balance valve is used as one part of hydraulic motor brake system. The function of this valve is to protect over-run or free falling of inertia load. But occasionally the brake system with counter balance valve makes some undesirable problems such as pressure surges or vibrations. In this study, for the purpose of easy estimation about dynamic characteristics of hydraulic system including counter balance valve, precise formulation describing fluid dynamics and valve dynamics under various boundary conditions were made. Dynamic characteristics were analysed by numerical integration using Runge-Kutta method, because the equations in this circuit with counter balance valve contain various nonlinear terms. Propriety of this analysis method is verified by experiment. For the purpose of obtaining fundamental data for preventing instability, this study experimented the effects of the spool taper, spring constant, cylindrical choke. And we developed double acting brake system integrated counter balance valve.

• ETRI Journal
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• v.24 no.5
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• pp.398-400
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• 2002

Using $Cr_2O_3$ thin film, we developed a novel etch-stop technique for the protection of silicon surface morphology during deep ion coupled plasma etching of silica layers. With this technique we were able to etch a silica trench with a depth of over 20 ${\mu}m$ without any damage to the exposed silicon terrace surface. This technique should be well applicable to fabricating silica planar lightwave circuit platforms for opto-electronic hybrid integration.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.1
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• pp.35-43
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• 2017

The three-dimensional integrated circuit (3D-IC) is a general trend for the miniaturized and high-performance electronic devices. The through-silicon-via (TSV) is the advanced interconnection method to achieve 3D integration, which uses vertical metal via through silicon substrate. However, the TSV based 3D-IC undergoes severe thermo-mechanical stress due to the CTE (coefficient of thermal expansion) mismatch between via and silicon. The thermo-mechanical stress induces mechanical failure on silicon and silicon-via interface, which reduces the device reliability. In this paper, the thermo-mechanical reliability of TSV based 3D-IC is reviewed in terms of mechanical fracture, heat conduction, and material characteristic. Furthermore, the state of the art via-level and package-level design techniques are introduced to improve the reliability of TSV based 3D-IC.

• Proceedings of the KWS Conference
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• 2006.05a
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• pp.16-17
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• 2006

We researched by the characteristic of a anisotropic etching of Si wafer and the Si career concerning the flip chip solder bump. Connectors and Anisotropic Conductive Film (ACF) method was already applied to board-to-board interconnection. In place of them, we have focused on board to board interconnection with solder bump by Si carrier, which has been used as Flip chip bonding technology. A major advantage of this technology is that the Flexible Printed Circuit (FPC) is connected in the same solder reflow process with other surface mount devices. This technology can be applied to semiconductors and electronic devices for higher functionality, integration and reliability.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.5
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• pp.349-357
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• 2016

The era of the Internet of Things (IoT) is upon us. In this era, minimizing power consumption becomes a primary concern for system-on-chip designers. While traditional power minimization and dynamic power management (DPM) techniques have been heavily explored to improve the power efficiency of devices inside very large-scale integration (VLSI) platforms, there is one critical factor that is often overlooked, which is the power conversion efficiency of a power delivery network (PDN). This paper is a tutorial that focuses on the power conversion efficiency of the PDN, and introduces novel methods to improve it. Circuit-, architecture-, and system-level approaches are presented to optimize PDN designs, while case studies for three different VSLI platforms validate the efficacy of the introduced approaches.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.412-414
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• 1999

The FSK demodulation module is the circuit which detects the data being transmitted from reader by FSK method. It doesn't use the PLL, and has lower power consumption and easier integration than conventional FSK detector using the PLL. So in a smart card, it is suitable to apply. In this study, the FSK demodulation module of the low power smart card is designed and analyzed.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.85-89
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• 1999

FDE panel was successfully fabricated through the integration of a 0.7" diagonal Si-based Mo-tip FEA with 25${\times}$25 pixels, Y2O3:Eu or ZnO:Zn phosphor screen, and vacuum sealing through an exhausting glass tube, including a getter. The panel system was driven by an external driver circuit having pulse width modulation(PWM) driving scheme. Before character imaging, it was stabilized through tip aging by slowly increasing a pulse-mode emission current and phosphor aging by a coulombic charging process. After aging, luminescent characteristics such as emission uniformity, charging and arcing phenomena were shown to be improved significantly.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2006.05a
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• pp.153-156
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• 2006

The vibration isolation system is a system that attenuates the vibration transmitted from surroundings by using external energy supply like electricity and feedback and/or feedforward functions. Such a system needs stiff structure to make precise positioning without ripple within a certain bandwidth. So, a horizontal and rotary arrangement of the actuation module is suggested by using lever linkage. Modeling and kinematic formulation are completed and system identification is accomplished to tune the design variables accurately. The vibration isolation control is performed by mu-synthesis with the uncertainties in design variables. Low frequency signal enhancement circuit and saturation proof integration algorithm are devised to use seismic sensors for displacement control. This overall system shows good disturbance rejection performance.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.14 no.1
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• pp.11-21
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• 1989

In this paper, a GMSK modulator was implemented with a gaussian lowpass filter using digital signal processing, a phase integration, D/A convers and auxiliary circuits. The relatively narrow bandwidth of power spectrum of the GMSK modulator is observed when the cut off frequency (B T) of the gaussian baseband filter is varied. In a demodulator, a discriminator type circuit is used. Using the above degital radio GMSK modem, BER is theoretically derived and experimentally measured when 16Kbps PRBS data is transmitted under Rayleigh fading and additive white gaussian noise conditions.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.289-292
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• 2005

New poly-Si TFTs have been proposed and fabricated in order to increases the output channel resistance ($r_o$). The counter-doped($p^+$) source is tied to the $n^+$ source and is extended into the channel region so that it employs the reverse bias depletion in the channel. As $V_{DS}$ is increased, the depletion width is increased and the effective channel width is reduced. Therefore, the output current saturates well and the $r_o$ is increased successfully. The proposed CMOS devices may improve the amplifier gain of data driver in active-matrix displays