• Applied Chemistry for Engineering
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• v.8 no.3
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• pp.533-542
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• 1997

Due to the trends of faster and denser circuit design, dielectric properties of packaging materials for semiconductor will give a greater influence on performance and reliability. Also as chip becomes more densified, thermal dissipation becomes a critical reliability issue. Consequently, four important properties for manufacturing semiconductor packaging materials are low values of dielectric constant, high values of thermal conductivity, relatively low values of thermal expansion coefficient and low cost. Thus, in this study, to achieve increased performance of EMC, crystalline silica was selected as the filler for epoxy matrix. As a result, when the volume percent of crystal silica was 60~70%, good properties as packaging materials for semiconductor were achieved. In addition, overall molding condition of EMC in this experiment was established.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.3
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• pp.138-144
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• 2017

In this paper, we propose a high frequency boosting circuits compensating for age-related hearing loss. The frequency response of this hearing loss is quite similar to that of a low-pass filter of which the critical frequency get lower with age. Therefore the voltage gain of this compensation circuits increase proportionally to the frequency of signals when the frequency is higher than the critical frequency and the voltage is constant irrespective of the frequency of signals when the frequency is lower than the critical frequency. The proposed circuits consist of a differential circuit and a unity gain amplifier. Because the critical frequency of the proposed circuits is controlled simply in the shape of a volume control lever, the aged people can adjust the high frequency boosting level easily according to one's hearing loss level. The critical frequency is continuously controllable in the whole audible frequency band and the gain of this high frequency boosting circuits is above 80dB at 10kHz.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.10
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• pp.133-137
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• 2016

Use of UV gel for nail management have been increasing gradually. In order to develop an UV lamp necessary to UV gel, in this study, we was designed circuits of the UV-LED lamp. Power supply part that supplies constant power to the several UV-LEDs, was designed the circuit with the method of DC-DC converter. Taking into account the direction of the thumb nail and the position of the little finger nail, it was placed UV-LEDs. Input power of the power supply part was used as a battery voltage of 3.8[V]. The output voltage of the power supply part was appeared in approximately 3.1[V]. And in order to examine the state of change of the output voltage according to the amount of current consumption of UV-LEDs, after inserting of load resister, the output voltage was more than about 3.0[V] in the simulation results of the power supply part while changing the resistance value.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.598-609
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• 2003

This paper describes a CMOS IF PLL frequency synthesizer. The designed frequency synthesizer can be programmed to operate at various intermediate frequencies using different external LC-tanks. The VCO with automatic amplitude control provides constant output power independent of the Q-factor of the external LC-tank. The designed frequency divider includes an 8/9 or 16/17 dual-modulus prescaler and can be programmed to operate at different frequencies by external serial data for various applications. The designed circuit is fabricated using a 0.35${\mu}{\textrm}{m}$ n-well CMOS process. Measurement results show that the phase noise is 114dBc/Hz@100kHz and the lock time is less than 300$mutextrm{s}$. It consumes 16mW from 3V supply. The die area is 730${\mu}{\textrm}{m}$$\times$950${\mu}{\textrm}{m}$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1267-1271
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• 2009

In this paper, a diplexer circuit to separate GSM from CDMA band is designed using a LTCC (Low Temperature Cofired Ceramic) multi-layer technology. In order to increase a integration capability of the diplexer, it is designed using 3-dimensional (3-D) multi-layer compact inductor and capacitors in e-layer LTCC substrate with a relative dielectric constant of 7. In order to achieve high selectivity of the bands, a shunt capacitor and inductor are designed in the high-pass filter (HPF) and low-pass filter (LPF), respectively. The size of the fabricated diplexer including CPW pads is 3,450 ${\times}$4,000 ${\times}$694 ${\mu}m^3$An insertion loss (IL) and return loss in GSM band are less than -1.35dB and more than -5.66dB,respectively. In the case of CDMA band, the IL of -1.54dBandRLof above -9.30dBare archived.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.11A
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• pp.1263-1270
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• 2004

A low-power 64-point FFT/IFFT processor core is designed, which is an essential block in OFDM-based wireless LAM modems. The radix-2/418 DIF (Decimation-ln-Frequency) FFT algorithm is implemented using R2SDF (Radix-2 Single-path Delay Feedback) structure. Some design techniques for low-power implementation are considered from algorithm level to circuit level. Based on the analysis on infernal data flow, some unnecessary switching activities have been eliminated to minimize power dissipation. In circuit level, constant multipliers and complex-number multiplier in data-path are designed using truncation structure to reduce gate counts and power dissipation. The 64-point FFT/IFFT core designed in Verilog-HDL has about 28,100 gates, and timing simulation results using gate-level netlist with extracted SDF data show that it can safely operate up to 50-MHz＠2.5-V, resulting that a 64-point FFT/IFFT can be computed every 1.3-${\mu}\textrm{s}$. The functionality of the core was fully verified by FPGA implementation using various test vectors. The average SQNR of over 50-dB is achieved, and the average power consumption is about 69.3-mW with 50-MHz＠2.5-V.

• Journal of Biomedical Engineering Research
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• v.25 no.4
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• pp.269-275
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• 2004

Different biological tissues have different values of electrical resistivity. In EIT (electrical impedance tomography), we try to provide cross-sectional images of a resistivity distribution inside an electrically conducting subject such as the human body mainly for functional imaging. However, it is well known that the image reconstruction problem in EIT is ill-posed and the quality of a reconstructed image highly depends on the measurement error. This requires us to develop a high-performance EIT system. In this paper, we describe the development of a 16-channel digital EIT system including a single constant current source, 16 voltmeters, main controller, and PC. The system was designed and implemented using the FPGA-based digital technology. The current source injects 50KHz sinusoidal current with the THD (total harmonic distortion) of 0.0029% and amplitude stability of 0.022%. The single current source and switching circuit reduce the measurement error associated with imperfect matching of multiple current sources at the expense of a reduced data acquisition time. The digital voltmeter measuring the induced boundary voltage consists of a differential amplifier, ADC, and FPGA (field programmable gate array). The digital phase-sensitive demodulation technique was implemented in the voltmeter to maximize the SNR (signal-to-noise ratio). Experimental results of 16-channel digital voltmeters showed the SNR of 90dB. We used the developed EIT system to reconstruct resistivity images of a saline phantom containing banana objects. Based on the results, we suggest future improvements for a 64-channel muff-frequency EIT system for three-dimensional dynamic imaging of bio-impedance distributions inside the human body.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.6
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• pp.155-166
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• 2016

It is important to configure capacitance(C) of the capacitor and the induction coefficient(L) of the work coil on the resonant circuit design stage in order to induce heating on the object by a precise and constant frequency components in the electromagnetic induction heating equipment. Work coil conducts a direct induction heating according to heating point and area of the object which has a fixed heat factor so that work coil is designed to has fixed value. On the other hands, Capacitor should be designed to be changed in order to be the higher the utilization of the entire equipment. It is extracted the samples by variation of single electrode capacity from the selection stage of raw materials for capacity to the stage of process design for output of the high frequency LC resonance of 700kHz on 1000 VAC maximum voltage and current to $200I_{MAX}$. It is suggested fundamental experiment results in order to prove relation for the optimal design of HF-LC resonance conduction-cooled capacitor based on the response of frequency characteristics and results of output parameters according to variation of the capacitance size.

• The Journal of the Acoustical Society of Korea
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• v.41 no.5
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• pp.481-491
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• 2022

The active sonar transmission system consists of a transmitter that outputs an electrical signal and an underwater acoustic transducer that converts the amplified electrical signal into an acoustic signal. In general, the transmitter output characteristics are dependent on load impedance, and an underwater acoustic transducer, which is a transmitter load, has a characteristic that the electrical impedance varies largely according to frequency when driven. In such a variable impedance condition, the output of the active sonar transmission system may become unstable. Hence, this paper proposes a design and control technique of a sonar transmitter for transmitting a stable transmission signal even under variable impedance conditions of an underwater acoustic transducer in an active sonar transmission system. The electrical impedance characteristics of the underwater acoustic transducer are experimentally analyzed, and the sonar transmitter is composed of a single-phase full-bridge inverter, an LC filter, and a matching circuit. In this paper, the design and output control method of the sonar transmitter is proposed to protect the transmitter and transducer. It can secure stable output voltage characteristics even if it transmits the Linear Frequency Modulation (LFM) signal. The validity is verified through the simulation and the experiment.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.10 s.113
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• pp.967-975
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• 2006

In this paper, design and implementation of a very compact and cost effective front-end module are presented for IEEE 802.16 FWA(fixed Wireless Access) in the 40 GHz band. A multi-layer LTCC(Low Temperature Co-fred Ceramic) technology with cavity process to achieve excellent electrical performances is used to fabricate the front-end module. The wirebond matching circuit design of switch input/output port and waveguide transition to connect antenna are optimally designed to keep transmission loss low. To reduce the size of the front-end module, the dielectric waveguide filter is developed instead of the metal waveguide filter. The LTCC is composed of 6 layers(with the thickness of a layer of 100 um) having a relative dielectric constant of 7.1. The front-end module is implemented in a volume of $30{\times}7{\times}0.8mm^3$ and shows an overall insertion loss < 5.3 dB, and image rejection value > 49 dB.