• ETRI Journal
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• v.32 no.6
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• pp.932-939
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• 2010

In this paper, a fast migration method is proposed. Our method executes local relocation on a model placement where an additional module is added to it for modification with a minimum number of displacements. This method is based on mean-field annealing (MFA), which produces a solution as reliable as a previously used method called simulated annealing. The proposed method requires substantially less time and hardware, and it is less sensitive to the initial and final temperatures. In addition, the solution runtime is mostly independent of the size and complexity of the input model placement. Our proposed MFA algorithm is optimized by enabling module rotation inside an energy function called permissible distances preservation energy. This, in turn, allows more options in moving the engaged modules. Finally, a three-phase cooling process governs the convergence of problem variables called neurons or spins.

• ETRI Journal
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• v.31 no.5
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• pp.585-592
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• 2009

This paper presents a method for decoding high minimal distance ($d_{min}$) short codes, termed Cortex codes. These codes are systematic block codes of rate 1/2 and can have higher$d_{min}$ than turbo codes. Despite this characteristic, these codes have been impossible to decode with good performance because, to reach high $d_{min}$, several encoding stages are connected through interleavers. This generates a large number of hidden variables and increases the complexity of the scheduling and initialization. However, the structure of the encoder is well suited for analog decoding. A proof-of-concept Cortex decoder for the (8, 4, 4) Hamming code is implemented in subthreshold 0.25-${\mu}m$ CMOS. It outperforms an equivalent LDPC-like decoder by 1 dB at BER=$10^{-5}$ and is 44 percent smaller and consumes 28 percent less energy per decoded bit.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.231-234
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• 2002

A transceiver for ADSL systems contains an interpolated combfilter, halfband filters, oversampling sigma delta modulator, a current steering DAC and an analog filler. The circuit complexity of the architecture makes it necessary to use behavioral models to determine the system features. For this reason, we need a specific behavioral simulation environment using the Matlab program. The Matlab is crucial for these circuits to be rapidly incorporated in larger systems, in particular in the context of mixed-signal-test schemes. Design trade-off among the blocks has also been discussed. The design methodology is based on behavioral design and CMOS process.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.5
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• pp.183-189
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• 2015

In this paper, we propose an efficient implementation method that current-voltage sourcing and measuring for LED using (+) single power. this method has the advantage of reducing the error of the circuit and calibration of system, and also improving the complexity of hardware than the method of using a (+)(-) current or voltage sourcing and measuring.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1069-1072
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• 1998

Recently the development of design and automation technology and manufacturing method, has reduced the cost of chip, but it becomes more difficult to test IC chip because test technique doesn't keep up with these techniques. In case of IC testing, obtaining test vectors to be able to detect good chip or bad one is very important, but according to increasing complexity, it is very complex and difficult. Another problem is that during testing, there could be capability of physical and electrical damage on chip. Also there is difficulty in synchronization between CUT (circuit under test) and Test equipment〔1〕. Because of these difficulties, built in self test has been proposed. Not only obtaining test vectors but also reducing test time becomes hot issues nowadays. This paper presents a new test BIST(built in self test) method. Proposed BIST implementation reduces test time and obtains high fault coverage. By searching internal nodes in which are inserted test_point_cells〔2〕and allocating TPG(test pattern generation) stages, test length becomes much shorter.

• Journal of information and communication convergence engineering
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• v.14 no.2
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• pp.106-114
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• 2016

Differential sensing methods are more effective in alleviating panel noise than single-line sensing, and thus have been increasingly used in the touch screen industry. However, they have a drawback: they tend to cancel out multiple touches and need touch position recovery algorithms. This paper introduces a novel algorithm of touch position recovery for differential sensing, which is a low-complexity but high-accuracy approach for determining multiple touch positions. We have implemented the proposed method in a touch screen controller system on a chip. In the simulation experiments using realistic touch screen models and a differential sensing circuit, the algorithm exhibited a high detection performance of a signal-to-noise ratio gain of up to 52.21 dB. Therefore, we can conclude that the proposed method is substantially more accurate than the previous method. Further, the proposed method incurs little or no overhead in terms of the detection speed and the chip size.

• Journal of Power Electronics
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• v.14 no.2
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• pp.217-225
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• 2014

This paper deals with the optimization of the driving techniques for the ZVT synchronous buck converter proposed in [1]. Two new gate drive circuits are proposed to allow this converter to operate by only one control signal as a 12V voltage regulator module (VRM). Voltage-driven method is applied for the synchronous rectifier. In addition, the control signal drives the main and auxiliary switches by one driving circuit. Both of the circuits are supplied by the input voltage. As a result, no supply voltage is required. This approach decreases both the complexity and cost in converter hardware implementation and is suitable for practical applications. In addition, the proposed SR driving scheme can also be used for many high frequency resonant converters and some high frequency discontinuous current mode PWM circuits. The ZVT synchronous buck converter with new gate drive circuits is analyzed and the presented experimental results confirm the theoretical analysis.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 1995.04a
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• pp.387-394
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• 1995

With respect to the effectiveness of types of knowledge on human diagnostic performance, the results of several experiments claimed that training with diagnostic rules (procedural knowledge) is more effective than training that provides theoretical knowledge (principle knowledge). However, we usually have the idea that understanding the principles of system dynamics is necessary for diagnosis in some situations. In this study, we pointed out some problems in the previous experiments that force to reinterpret their experimental conclusions. Accordingly, we conducted an experiment to reinvestigate the value of theoretical knowledge in two problem situations. A simulator system, which is named DLD, that is to diagnose an electronic device was created for this purpose. It is a context-free digital logic circuit which includes forty-one gates of three basic types. Our experiment investigated the marginal effects of theoretical knowledge over common diagnostic rules. The experimental results showed that the effectiveness of the instruction in theoretical knowledge is dependent on the complexity of diagnostic situations. This adds up an experimental evidence against the presumed ineffectiveness of theoretical knowledge and forward reasoning in fault diagnosis. Furthermore, the result suggests the source of the use of theoretical knowledge.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.4
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• pp.161-166
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• 2014

An accurate gain-of-two amplifier, which successfully reduces the capacitor mismatch error is proposed. This amplifier has similar circuit complexity and linearity improvement to the capacitor error-averaging technique, but operates with two clock phases just like the conventional pipeline stage. This makes it suitable for high-speed, high-resolution analog-to-digital converters (ADCs). Two ADC architectures employing the proposed accurate gain-of-two amplifier are also presented. The simulation results show that the proposed ADCs can achieve 15-bit linearity with 8-bit capacitor matching.

• Journal of Power Electronics
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• v.13 no.5
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• pp.787-797
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• 2013

Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.