• Journal of information and communication convergence engineering
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• 제6권1호
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• pp.43-46
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• 2008

This paper proposes an advanced test circuit for detecting the connectivity between a drum ring of laser printer and PCB. The detection circuit of charge sharing is proposed, which minimizes the influences of internal parasitic capacitances. The test circuit is composed of precharge circuit, analog comparator, level shifter. Its functional operation is verified using $0.6{\mu}m$ 3.3V/40V CMOS process parameter by HSPICE. Access time is100ns. Layout of the drum contact test circuit is $465{\mu}m\;{\times}\;117{\mu}m$.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2001년도 ICCAS
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• pp.108.6-108
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• 2001

The basic circuit block diagram of CMOS current mode sum and subtract circuit is present in this paper. The purpose circuit consists of the invert current circuit and the basic current mirror. The outputs of the circuit are the summing of the both input current [lx+ly] and also the subtract of the both input current [lx+(-ly)]. The SPICE simulation results of the electrical characteristics with level 7 (BSIM3 model version 3.1) MOSFET transistor model of the circuit such as the input dynamic range, the frequency response and some system application have been shown and analyzed.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.69-72
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• 2003

This paper presents a current-mode multiple-input minimum circuit. The proposed circuit can be implemented by applying De Morgan’s law. The circuit diagram is simple and modular. It operates using a single 2.5V supply and has very low dissipation. The realization method is suitable for fabrication using CMOS technology and all transistors are operated in their saturation region. The performances of this proposed circuit were studied using the PSPICE analog simulation program. The simulation results show the approval of this circuit that it has adequate basic performances for a real-time fuzzy controller and a fuzzy computer.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2753-2756
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• 2003

A convenient, tunable loop-gain negative impedance circuit that increases input impedance of a front-end in a bioimpedance measurement has been proposed. Since the proposed circuit comprises wide-band operational amplifiers, selecting operational amplifiers is easy, while an operational amplifier of proper bandwidth should be chosen to use conventional circuit. Also, since loop-gain can be controlled by a feedback resistor connected serially with a feedback capacitor, loop-gain is tunable with a potentiometer. The input impedance of the proposed circuit is two times larger than that of the conventional circuit. Furthermore, closed loop phase response of the proposed circuit is better than that of the conventional circuit or without a negative capacitance circuit. The implemeted, proposed circuit showed stable operation and a zero input capacitance.

• 전기학회논문지
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• 제58권8호
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• pp.1644-1650
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• 2009

An improved guarding circuit is applied to a transconductance driven-right-leg circuit to decrease common-mode current at measurement electrodes due to power-line interference. After showing conventional guarding circuit is instable due to gain-peaking when used with a transconductance DRL circuit, the effect of the proposed guarding circuit modified to suppress the gain-peaking by inserting a series resistor between shields and a shield driver was analyzed. It is shown that, besides stability, the proposed guarding circuit provides two other advantages: 1) The gain of the shield driver can be set to be unit nominally. 2) The loop gain of the transconductance DRL loop can be increased due to pole-zero canceling. The proposed circuit was implemented and the advantages were confirmed.

• 전력전자학회논문지
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• 제18권2호
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• pp.117-122
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• 2013

The distributed power conversion LED driver circuit using parasitic inductance is proposed in this paper. while the conventional LED driver circuit is composed of the large size devices and heatsinks, the proposed circuit can be realized with the small sized no heatsink based. since the processing power can be effectively distributed. Also by using the wire parasitic inductance of the LED string, the proposed circuit can be implemented without external magnetic device. As a result, the proposed circuit which features the small size and volume con be realized even without LED driver module(LDM) board. since, all the device can be attached to the existing LED array Module(LAM) board. Therefore, it features that cost savings and volume reduction of circuit. To confirm the validity of the proposed circuit, theoretical analysis and experimental results from a distributed power conversion LED driver circuit prototype are presented.

• 한국초전도ㆍ저온공학회논문지
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• 제18권4호
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• pp.30-34
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• 2016

In this study, a SFCL-combined DC circuit breaker system was proposed by applying the current-limiting technology for DC circuit breaking. The SFCL-combined circuit breaker system consists of a mechanical DC circuit breaker combined with superconductors. To ensure the reliable structure and operation of the SFCL-combined circuit breaker system, a simulation grid was designed using the EMTDC/PSCAD program, and simulation was conducted. The results showed that the SFCL-combined DC circuit breaker system with superconductors limited the maximum fault current by 37%. In addition, the burden on the DC circuit breaker was decreased by 87%.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제49권2호
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• pp.85-92
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• 2000

30 kVA rotating-field type Super-Conducting Generator is built and tested with intensive FE(Finite Element) analysis. The generator is driven by VVVF inverter-fed induction motor. Open Circuit Characteristic(OCC) and Short Circuit Characteristic(SCC) are presented in this paper. Also, the test result under the light load(up to 3.6 kW) are given. From the design stage, 2-D FE analysis coupled with the external circuit has been performed. The external circuit includes the end winding resistance and reactance as well as two dampers. When compared with the test data, the FE analysis results show a very good agreement.

• 한국전기전자재료학회논문지
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• 제25권9호
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• pp.686-691
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• 2012

In this paper, we designed a Chua's chaotic circuit using transcondcutor based nonlinear resistor. Proposed chaotic circuit consist of L, C, R and transcondcutor based Chua's diode. We performed SPICE simulation for chaotic dynamics such as time seriesform, frequency analysis and phase plane of the circuit. Chaotic dynamics of the circuit was analysed according to MOS size variation of the operational transconductance amplifier. Also, we performed SPICE circuit analysis for temperature dependance of the circuit. SPICE results showed that chaotic dynamics of the circuit varied according to the temperature variation and chaotic signals were generated in specific temperature conditions.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.183-185
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• 2002

This paper proposes the test method for the testing of a RLC parallel circuit on the electronic circuit board. This method utilizes a guarding circuit and a phase detection circuit. The guarding circuit separates electrically the tested device or circuit from printed circuit board. Phase detector estimates the phase difference from two signals, voltage and current. This method computes R. L and C value from phase difference($\theta$) and impedance value(Z) obtained by enforcing two other frequence stimulus under the guarding state.