• Title/Summary/Keyword: Cipher Algorithm

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A study on the hardware implementation of the digicipher equalization system (DigiCipher 등하시스템의 하드웨어 구현방법에 관한 연구)

  • 채승수;반성범;이기헌;박래홍;김영상;이병욱
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.6
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    • pp.176-185
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    • 1996
  • In this paper, we present the modified CMA (constant modulus algorithm) and LMS (least mean square) algorithms for digiCipher system with reduced hardware cost, in which the pipelined architecture is employed. They yield the performance comparable to that using floating-point operations. We show the effecstiveness of the proposed architecture through the implementation results using VHDL.

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Block Cipher Circuit and Protocol for RFID in UHF Band (UHF 대역 RFID 시스템을 위한 블록 암호 회로와 프로토콜)

  • Lee, Sang-Jin;Park, Kyung-Chang;Kim, Han-Byeo-Ri;Kim, Seung-Youl;You, Young-Gap
    • The Journal of the Korea Contents Association
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    • v.9 no.11
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    • pp.74-79
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    • 2009
  • This paper proposes a hardware structure and associated finite state machine designs sharing key scheduling circuitry to enhance the performance of the block cypher algorithm, HIGHT. It also introduces an efficient protocol applicable to RFID systems comprising the HIGHT block cipher algorithm. The new HIGHT structure occupies an area size small enough to accommodate tag applications. The structure yields twice higher performance them conventional HIGHT algorithms. The proposed protocol overcomes the security vulnerability of RFID tags and thereby strengthens the security of personal information.

An Efficient Parallelized Algorithm of SEED Block Cipher on Cell BE (CELL 프로세서를 이용한 SEED 블록 암호화 알고리즘의 효율적인 병렬화 기법)

  • Kim, Deok-Ho;Yi, Jae-Young;Ro, Won-Woo
    • The KIPS Transactions:PartA
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    • v.17A no.6
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    • pp.275-280
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    • 2010
  • In this paper, we discuss and propose an efficiently parallelized block cipher algorithm on the CELL BE processor. With considering the heterogeneous feature of the CELL BE architecture, we apply different encoding/decoding methods to PPE and SPE and improve the throughput. Our implementation was fully tested, with execution results showing achievement of high throughput, capable of supporting as high network speed as 2.59 Gbps. Compared to various parallel implementations on multi-core systems, our approach provides speedup of 1.34 in terms of encoding/decoding speed.

A study on development of CATIA V5 file security system using CAA (CAA를 이용한 CATIA V5 파일보안시스템 개발에 관한 연구)

  • Chae H.C.;Park D.S.;Byun J.H.
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.417-418
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    • 2006
  • CATIA V5 is one of the most preferred softwares in product design for domestic and industrial use. But with the development of the IT industry, design data by CATIA V5 can easily be hacked and stolen especially via the internet and through assistance storage medium. The design data could be protected through executive, physical and technical security system. The best way to maintain confidentiality of data from unauthorized access is to have a cryptosystem of the technical security. In this paper, a cryptosystem for the protection of design data was being proposed. The memory contains the file information made by the New and Open function of CATIA V5. No error can be expected even if the file changed before of after the application of Save and Open function, A cryptosystem was constructed in CATIA V5 by inserting crypto algorithm before and after the I/O process. The encryption/decryption algorithm of each function was based on the complex cipher, which applied permutation cipher and transpose cipher. The file security system was programmed in CAA V5 and Visual C++.

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A Study on Development of CATIA V5 File Security System Using CAA (CAA를 이용한 CATIA V5 파일보안시스템 개발에 관한 연구)

  • Chae, Hee-Chang;Park, Doo-Seob;Byun, Jae-Hong
    • Journal of the Korean Society for Precision Engineering
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    • v.24 no.5
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    • pp.77-81
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    • 2007
  • CATIA V5 is one of the most preferred softwares in product design for domestic and industrial use. But with the development of the IT industry, design data by CATIA V5 can easily be hacked and stolen especially via the internet and through assistance storage medium. The design data could be protected through executive, physical and technical security system. the best way to maintain confidentiality of data from unauthorized access is to have a cryptosystem of the technical security. In this paper, a cryptosystem for the protection of design data was being proposed. The memory contains the file information made by the New and Open function of CATIA V5. No error can be expected even if the file changed before of after the application of Save and Open function. A cryptosystem was constructed in CATIA V5 by inserting crypto algorithm before and after the I/O process. The encryption/decryption algorithm of each function was based on the complex cipher, which applied permutation cipher and transpose cipher. The file security system was programmed in CAA V5 and Visual C++.

A Design of Block cipher-Secure Electronic Xenogenesis Alorithm for Efficient Plaintext Management in Block Cryptosystem

  • Lee, Seon-Keun;Kim, Hwan-Yong
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.4C
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    • pp.356-364
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    • 2003
  • Presently, etwork is being in the existence as an influence can not be neglected. This rapid progress of network has gone with development of mobile network and information communication. But the development of network can generate serous social problems. So, it is highly required to control security of network. These problems related security will be developed and keep up to confront with anti-security part such as hacking, cracking. There's no way to preserve security from hacker or cracker without delvelopping new cryptographic algorithm or keeping the state of anti-cryptanalysis in a prescribed time by means of extendig key-length. Worldwidely, many researchers for network security are trying to handle these problems. In this paper, we proposed a new block cryptosystem. The Block cipher-Secure Electronic Xenogenesis Algorithm(B-SEXA) which is capable to cipher regardless of key distribution or key-length for these definite problem is proposed and designed in hardware. B-SEXA increase secret level from using a MDP and MLP in maximum is proposed to prevent cryptograpy analysis. The designed B-SEXA in this paper performed synthesization and simulation using Synopsys Vwe. 1999.10 and VHDL.

The Secure Chip for Software Illegal Copy Protection (소프트웨어 불법복제방지를 위한 보안칩)

  • 오명신;한승조
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.4
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    • pp.87-98
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    • 2002
  • Software has been developed very fast as information has become important value. Illegal software copy has been the main problem of developing software business. Recently used protecting lock system for software copy has not guaranteed perfectly from easily cracked-defense system. This paper, therefore, proposes 96-bit block cipher with 112-bit length to replace a DES(Data Encryption Standard) algorithm. Security chip by ASIC(Application Specific Integrated Circuit) security module is presented for software copy protection. Then, an auto block protecting algorithm is designed for the security chip. Finally, controlling driver and library are built for the security chip.

Higher-Order Countermeasures against Side-Channel Cryptanalysis on Rabbit Stream Cipher

  • Marpaung, Jonathan A.P.;Ndibanje, Bruce;Lee, Hoon Jae
    • Journal of information and communication convergence engineering
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    • v.12 no.4
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    • pp.237-245
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    • 2014
  • In this study, software-based countermeasures against a side-channel cryptanalysis of the Rabbit stream cipher were developed using Moteiv's Tmote Sky, a popular wireless sensor mote based on the Berkeley TelosB, as the target platform. The countermeasures build upon previous work by improving mask generation, masking and hiding other components of the algorithm, and introducing a key refreshment scheme. Our contribution brings improvements to previous countermeasures making the implementation resistant to higher-order attacks. Four functional metrics, namely resiliency, robustness, resistance, and scalability, were used for the assessment. Finally, performance costs were measured using memory usage and execution time. In this work, it was demonstrated that although attacks can be feasibly carried out on unprotected systems, the proposed countermeasures can also be feasibly developed and deployed on resource-constrained devices, such as wireless sensors.

Reliable and Secure Voice Encryption over GSM Voice Channel

  • Lee, Hoon-Jae;Jang, Won-Tae;Kim, Tae-Yong
    • Journal of information and communication convergence engineering
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    • v.8 no.1
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    • pp.64-70
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    • 2010
  • In this paper, we study and develope a special secure Dongle to be adapted in GSM SmartPhone for secure voice communication to the serial 20-pin connector in SmartPhone. We design and implement the Dongle module hardware, firmware, and software including cipher crypto-synchronization and cipher algorithm. Also we study and emulate the SmartPhone GUI software interface including communication software module to the Dongle. Finally, we analyze the performances of crypto-synchronization in some noisy environment and also we test the secure Dongle module.