• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.202-211
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• 2014

The bulk current injection (BCI) and direct power injection (DPI) method have been established as the standards for the electromagnetic susceptibility (EMS) test. Because the BCI test uses a probe to inject magnetically coupled electromagnetic (EM) noise, there is a significant difference between the power supplied by the radio frequency (RF) generator and that transferred to the integrated circuit (IC). Thus, the immunity estimated by the forward power cannot show the susceptibility of the IC itself. This paper derives the real injected power at the failure point of the IC using the power transfer efficiency of the BCI method. We propose and mathematically derive the power transfer efficiency based on equivalent circuit models representing the BCI test setup. The BCI test is performed on I/O buffers with and without decoupling capacitors, and their immunities are evaluated based on the traditional forward power and the real injected power proposed in this work. The real injected power shows the actual noise power level that the IC can tolerate. Using the real injected power as an indicator for the EMS test, we show that the on-chip decoupling capacitor enhances the EM noise immunity.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.93-100
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• 2008

In this paper, we address a novel simulated annealing(SA)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip(SoCs), on the assumption that the test platform proposed in [1] is installed. The proposed method efficiently mixed the rectangle packing method with SA and improved the scheduling results by locally changing the test access mechanism(TAM) widths for cores and the testing orders. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce the overall test time.

• Journal of the Korea Safety Management & Science
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• v.20 no.3
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• pp.21-26
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• 2018

This paper describes result of a study on safety against a fire of charging cable for mobile phone for vehicle. Combustion on the USB cable in the car was happened while driving. Gas coming from the burning USB cable could be a reason which can make a secondary car accident since the driver also can be embarrassed while driving. In order to prevent a secondary car accident connected on the road, to research a reason why USB cable can emit gas and be burned in charging. We did simulation test with abnormal fault condition for the electronic component on the board in the USB cable. So we get the result from abnormal fault condition simulation test, for instance, shorted test for output terminal of 8 pin switch, shorted test for chip resistor after thermal aging in the condition $25^{\circ}C$, 93 % RH during 48 hours. To analysis the result of all test, Combustion on the USB cable was not the 8 pin but other electrical component such as a chip resistor. Therefore we guess that the reason for USB cable combustion in charging in a car was not 8 pin and a LED but another defective component.

• Proceedings of the Plant Resources Society of Korea Conference
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• 2023.04a
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• pp.25-25
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• 2023

As the demand for processing potatoes increases, imports of raw potatoes and potato products are increasing, so it is necessary to expand potato production as raw materials for processing in Korea. Potato varieties for processing that can be grown in fall have been developed, but research on cultivation technology and processing quality management technology to improve chip processing quality is very insufficient. Therefore, this study was conducted to investigate the optimal harvest time by investigating the quantity and chipping characteristics of potato chips during autumn cultivation. As the test varieties, the chip processing varieties "Saebong", "Eunsun", and "Geumnaru" were used, and the potato cultivation site was the Seocheon-gun Test field (214 Gaeya-ri) of the Chungcheongnam-do. The test treatment was at harvest time after spring cultivation, and the potatoes were harvested at 70, 80, 90, and 100 days after sowing based on the sowing time. The investigation items were potato productivity (total yield, yield of standard processing, and number of tubers) and chip-processing characteristics (chip color, dry matter content, glucose content, etc.). As a result of examining the yield characteristics according to the harvest time, statistical significance was not found according to the treatment. The total yield (ton/ha) was 27.5 to 30.5, and there was no significant difference depending on the time of 70 to 100 days after harvest. The standard quantity for processing (yield of 81-250g potatoes per unit) also showed a similar trend. In chipping characteristics according to harvest time, statistical significance was high in specific gravity and glucose content. The specific gravity was highest at 1.077 at 70 days after harvest, and the glucose (mg/dL) content was the lowest at 37.5 at 80 days after harvest. Statistical significance was not recognized, but chip color (L value) was the highest at 64.4 at 70 days after harvest. Therefore, it is judged that the optimal harvesting time for chip processing is 70 to 80 days after sowing.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.31 no.3D
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• pp.413-420
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• 2011

An experiment was conducted to suggest the road pavement material combining wooden chip crushed from little useful roots and branches from logging sites or wood waste from construction sites with urethane resin. For the specimen, the mass ratio of urethane resin to construction wood waste chip/lumber waster chip was set to three different levels of 0.5, 0.75, and 1.0, which was measured, mixed with mixer, and molded; 7 days after, tensile strength test, elasticity test using golf balls and steel balls, permeability coefficient measurement, and flammability test were executed. As the result, the tensile strength of the specimen at the dry state in the air exhibited the range of 0.2-1.1MPa, and there was no change after 7 days of aging. When submerged in water, however, the strength was partially diminished; the diminishing rate was greater for less urethane resin usage, and therefore it appears desirable to set the mass ratio of resin to the wood waste chip over 0.75 to consider the moisture intrusion by precipitation and such. As the result of elasticity test, the GB and SB coefficients of the specimen using wood waste chips and urethane resin were measured to be low at below 20%, exhibiting excellent elasticity as road pavement material. Also, the permeability coefficient was over 0.5mm/sec for specimens of all combinations, exceeding the standard value required after construction for permeable pavement material, and the flammability of wood-type pavement material was evaluated to have no practical issues.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.5
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• pp.283-288
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• 2000

In this work, small-size, high-performance simple solenoid-type RF chip inductors utilizing an Al2O3 core material were investigated. Copper (Cu) wire with $40\mum$ diameter was used as the coils and the size of the chip inductor fabricated in this work was $2.1mm\times1.5mm\times1.0mm$. The external current source was applied after bonding Cu coil leads to gold pads electro-plated on each end of backsides of a core material. High frequency characteristics of the inductance (L), quality factor (Q), and impedance (Z) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. The developed inductors have the self-resonant frequency (SRF) of 1.1 to 3.1 GHz and exhibit L of 22 to 150 nH. The L of the inductors decreases with increasing the SRF. The Z of the inductors has the maximum value at the SRF and the inductors have the quality factor of 70 to 97 in the frequency range of 500 MHz to 1.5 GHz.

• Asian Pacific Journal of Cancer Prevention
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• v.16 no.9
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• pp.3709-3713
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• 2015

Background: Many factors, including molecular ones, were demonstrated to be associated with long-term prognosis of hepatocellular carcinoma (HCC). Thus far, the expression and clinicopathologic and prognostic significance of the carboxyl terminus of Hsp70-interacting protein (CHIP) in B-type hepatitis virus (HBV)-related HCC remain unknown. Materials and Methods: CHIP expression was detected by immunohistochemical staining of surgical samples from 79 patients with HCC with HBsAg positivity. In addition, correlations with clinicopathologic parameters and patient survival were evaluated. Results: It was found that positive CHIP staining was observed in tumor, but not non-tumor, tissues. High expression of CHIP was significantly related to larger tumor size, with marginally significant associations noted for presence of portal vein invasion and higher serum a-fetoprotein level. In addition, univariate analysis showed that high CHIP expression was a powerful predictor for dismal overall and disease-free survival. However, independent prognostic implications of CHIP were not proven in multivariate Cox regression test. Conclusions: CHIP is overexpressed in HBV-related HCC and is associated with unfavorable biological behavior as well as poor prognosis. However, its prognostic role needs to be further validated.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.3
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• pp.27-32
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• 2010

For the flip chip joints processed using Cu pillar bumps and Sn pads, thermal cycling and high temperature storage reliabilities were examined as a function of the Sn pad height. With increasing the height of the Sn pad, which composed of the flip chip joint, from 5 ${\mu}m$ to 30 ${\mu}m$, the contact resistance of the flip chip joint decreased from 31.7 $m{\Omega}$ to 13.8 $m{\Omega}$. Even after thermal cycles of 1000 times ranging from $-45^{\circ}C$ to $125^{\circ}C$, the Cu pillar flip chip joints exhibited the contact resistance increment below 12% and the shear failure forces similar to those before the thermal cycling test. The contact resistance increment of the Cu pillar flip chip joints was maintained below 20% after 1000 hours storage at $125^{\circ}C$.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.04a
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• pp.35-43
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• 2001

Flip chip assembly on organic substrates using ACAs have received much attentions due to many advantages such as easier processing, good electrical performance, lower cost, and low temperature processing compatible with organic substrates. ACAs are generally composed of epoxy polymer resin and small amount of conductive fillers (less than 10 wt.%). As a result, ACAs have almost the same CTE values as an epoxy material itself which are higher than conventional underfill materials which contains lots of fillers. Therefore, it is necessary to lower the CTE value of ACAs to obtain more reliable flip chip assembly on organic substrates using ACAs. To modify the ACA composite materials with some amount of conductive fillers, non-conductive fillers were incorporated into ACAs. In this paper, we investigated the effect of fillers on the thermo-mechanical properties of modified ACA composite materials and the reliability of flip chip assembly on organic substrates using modified ACA composite materials. Contact resistance changes were measured during reliability tests such as thermal cycling, high humidity and temperature, and high temperature at dry condition. It was observed that reliability results were significantly affected by CTEs of ACA materials especially at the thermal cycling test. Results showed that flip chip assembly using modified ACA composites with lower CTEs and higher modulus by loading non-conducting fillers exhibited better contact resistance behavior than conventional ACAs without non-conducting fillers. Microwave model and high-frequency measurement of the ACF flip-chip interconnection was investigated using a microwave network analysis. ACF flip chip interconnection has only below 0.1nH, and very stable up to 13 GHz. Over the 13 GHz, there was significant loss because of epoxy capacitance of ACF. However, the addition of $SiO_2filler$ to the ACF lowered the dielectric constant of the ACF materials resulting in an increase of resonance frequency up to 15 GHz. Our results indicate that the electrical performance of ACF combined with electroless Wi/Au bump interconnection is comparable to that of solder joint.

• Journal of Welding and Joining
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• v.19 no.5
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• pp.520-525
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• 2001

The Sn-Pb eutectic solder bump formation ($150\mu\textrm{m}$ diameter, $250\mu\textrm{m}$ pitch) by electroplating was studied for flip chip package fabrication. The effect of current density and plating time on Sn-Pb deposit was investigated. The morphology and composition of plated solder surface was examined by scanning electron microscopy. The plating thickness increased wish increasing time. The plating rate became constant at limiting current density. After the characteristics of Sn-Pb plating were investigated, Sn-Pb solder bumps were fabricated in optimal condition of $7A/dm^$. 4hr. Ball shear test after reflow was performed to measure adhesion strength between solder bump and UBM (Under Bump Metallurgy). The shear strength of Sn-Pb bump after reflow was higher than that of before reflow.