• Title/Summary/Keyword: Chip inductor

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A Small-Area Solenoid Inductor Based Digitally Controlled Oscillator

  • Park, Hyung-Gu;Kim, SoYoung;Lee, Kang-Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.3
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    • pp.198-206
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    • 2013
  • This paper presents a wide band, fine-resolution digitally controlled oscillator (DCO) with an on-chip 3-D solenoid inductor using the 0.13 ${\mu}m$ digital CMOS process. The on-chip solenoid inductor is vertically constructed by using Metal and Via layers with a horizontal scalability. Compared to a spiral inductor, it has the advantage of occupying a small area and this is due to its 3-D structure. To control the frequency of the DCO, active capacitor and active inductor are tuned digitally. To cover the wide tuning range, a three-step coarse tuning scheme is used. In addition, the DCO gain needs to be calibrated digitally to compensate for gain variations. The DCO with solenoid inductor is fabricated in 0.13 ${\mu}m$ process and the die area of the solenoid inductor is 0.013 $mm^2$. The DCO tuning range is about 54 % at 4.1 GHz, and the power consumption is 6.6 mW from a 1.2 V supply voltage. An effective frequency resolution is 0.14 kHz. The measured phase noise of the DCO output at 5.195 GHz is -110.61 dBc/Hz at 1 MHz offset.

Variation of Characteristics of Solenoid-Type RF Chip Inductors on Inductor Size (인덕터 크기에 따른 솔레노이드 형 RF 칩 인덕터 특성 변화)

  • Yun, Eui-Jung;Kim, Jae-Wook
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.7
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    • pp.339-343
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    • 2006
  • In this study, the variations of the important characteristics of solenoid-type RF chip inductors utilizing a low-loss A1203 core material on inductor dimensions were investigated systematically. Four dimensions of the chip inductors fabricated in this work were $1.0\times0.5\times0.5mm^3,\;1.5\times1.0\times0.7mm^3,\;2.1\times1.5\times1.0mm^3,\;and\;2.4\times2.0\times1.4mm^3$ and copper (Cu) wire with $40{\mu}m$ diameter was used as the coils. High frequency characteristics of the inductance, quality factor, and impedance of developed inductors as a function of inductor dimensions were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). It was observed that the developed inductors with the number of turns of 6 have the inductance (L) of 12 to 82 nH and exhibit the self-resonant frequency (SRE) of 3.6 to 1.2 GHz. The SRF of inductors decreases with increasing the inductor size while the L increases with the inductor size. The smallest inductors of $1.0\times0.5\times0.5mm^3$ exhibited the L of 12 nH, SRF of 3.6 GHz, and the quality factor of 67 near the frequency of 1.1 GHz. The calculated data predicted the high-frequency data of the L, and Q of the developed inductors well.

A Compact C-Band Semi-Lumped Lowpass Filter with Broad Stopband Using a Chip Inductor (칩 인덕터를 사용하여 광대역 저지 특성을 갖는 소형 C-밴드 Semi-Lumped 저역 통과 여파기)

  • Jang, Ki-Eon;Lee, Gi-Moon;Kim, Ha-Chul;Choi, Hyun-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.12
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    • pp.1359-1364
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    • 2012
  • The C-band semi-lumped lowpass filter with broad stopband and compact size characteristic using chip inductor is proposed. To provide an additional attenuation pole in stopband by SRF, a separable inductor is added to proposed structure, and it has broad stopband characteristic. The third order elliptic function lowpass filter with chip inductor(L: 9.1 nH, SRF: 5.5 GHz, Q: 25) has insertion loss of 0.38 dB, cutoff frequency of 920 MHz, broad stopband(below 20 dB) of 1.43~7.8 GHz and the size is reduced 37.4 % compared to distributed inductor.

A 6Gbps 1:2 Demultlplexer Design Using Micro Stacked Spiral inductor in CMOS Technology (Micro Stacked Spiral Inductor를 이용한 6Gbps 1:2 Demultiplexer 설계)

  • Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.58-64
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    • 2008
  • A 6Gbps 1:2 demultiplexer(DEMUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. For high speed performance current mode logic(CML) flipflop was used and inductive peaking technology was used so as to obtain higher speed than conventional Current mode logic flipflop. On-chip spiral inductor was designed to maximize the inductive peaking effect using stack structure. Total twelve inductors of $100{\mu}m^2$ area increase was used. The measurement was processed on wafer and 1:2 demultiplexer with and without micro stacked spiral inductors were compared. For 6Gbps data rate measurement, eye width was improved 7.27% and Jitter was improved 43% respectively. Power consumption was 76.8mW and eye height was 180mV at 6 Gbps

A Study of Power Inductor for Slim Mobile Communication Set (휴대용 이동 통신기기의 슬림화를 위한 전력용 인덕터의 연구)

  • Kim, Du-Il;Seo, Jong-Go;Kim, Sung-Il;Uhm, Jae-Hyun;Jung, Jin-Hwee;Lee, Hea-Jong
    • Proceedings of the KIEE Conference
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    • 2005.11a
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    • pp.48-50
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    • 2005
  • As technology is developed, customers want to use many functions in one system. Manufacturers want to reach the customer's needs, make systems more small, thin, light-weight. To make them real, it is necessary to make components to be small and thin. But components of power stage are big, thick and heavy-weighted yet. especially power inductor is the most significant component. This paper proposed a novel chip-type power inductor I-type inductor. Inductor that proposed has 3225-size, 5.6uH and 1.3A of max saturation current. And it has $R_{DC}$ of $0.25{\Omega}$ which is smaller than $0.45{\Omega}$ of chip-type inductor and $0.9{\Omega}$ of coil-type inductor.

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A 2.5Gb/s 2:1 Multiplexer Design Using Inductive Peaking in $0.18{\mu}m$ CMOS Technology (Micro spiral inductor를 이용한 2.5Gb/s급 2:1 Multiplexer 설계)

  • Kim, Sun-Jung;Choi, Jung-Myung;Burm, Jin-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.8
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    • pp.22-29
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    • 2007
  • A 2.5Gb/s 2:1 multiplexer(MUX) IC using $0.18{\mu}m$ CMOS was designed and fabricated. Inductive peaking technology was used to improve the performance. On-chip micro spiral inductor was designed to maximize the inductive peaking effect without increasing the chip area much. The designed 4.7 nH micro-spiral inductor was $20\times20{\mu}m2$ in size. 2:1 MUX with and without micro spiral inductors were compared. The rise and fall time was improved more than 23% and 3% respectively using the micro spiral inductors for 1.25Gb/s signal. For 2.5 Gb/s signal, fall and rise time was improved 5.3% and 3.5% respectively. It consumed 61mW and voltage output swing was 1$180mV_{p-p}$ at 2.5Gb/s.

A Study of Micro, High-Performance Solenoid-Type RF Chip Inductor (Solenoid 형태의 소형.고성능 RF Chip 인덕터에 대한 연구)

  • Kim, Jae-Uk;Yun, Ui-Jung;Jeong, Yeong-Chang;Hong, Cheol-Ho;Seo, Won-Chang
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.5
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    • pp.283-288
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    • 2000
  • In this work, small-size, high-performance simple solenoid-type RF chip inductors utilizing an Al2O3 core material were investigated. Copper (Cu) wire with $40\mum$ diameter was used as the coils and the size of the chip inductor fabricated in this work was $2.1mm\times1.5mm\times1.0mm$. The external current source was applied after bonding Cu coil leads to gold pads electro-plated on each end of backsides of a core material. High frequency characteristics of the inductance (L), quality factor (Q), and impedance (Z) of developed inductors were measured using an RF Impedance/Material Analyzer (HP4291B with HP16193A test fixture). This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. This HP4291B was also used to obtain the equivalent circuit and its circuit parameters of the chip inductors. The developed inductors have the self-resonant frequency (SRF) of 1.1 to 3.1 GHz and exhibit L of 22 to 150 nH. The L of the inductors decreases with increasing the SRF. The Z of the inductors has the maximum value at the SRF and the inductors have the quality factor of 70 to 97 in the frequency range of 500 MHz to 1.5 GHz.

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An Integrated LTCC Inductor and Its Application (LTCC 기술을 이용한 마이크로 인덕터 및 응용)

  • Kim Chan-Young;Kim Hee-Jun
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.53 no.11
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    • pp.680-686
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    • 2004
  • An integrated inductor using the low temperature cofiring ceramics(LTCC) technology was fabricated. The inductor has Ag circular spiral coil with 16 turns (2-turn x 8-layer) and has a dimension of 11.52mm diameter and 0.71mm thick. For the fabricated inductor, calculation method of inductance was given and it is confirmed that the calculated value is very close to the measured one. Finally as an application of the LTCC integrated inductor to low power electronic circuits, a LTCC buck DC/DC converter with 1.32W output power and 1MHz switching frequency using the inductor fabricated was developed. For the converter the maximum efficiency of about 81% was obtained.

Fabrication of Micromachined On-chip High Ratio Air Core Solenoid Inductor (MEMS에 의한 On-chip 고종횡비 Air Core Solenoid 인덕터의 제작)

  • Lee Jeong-Bong;Kim Kyung-Hwan
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.8
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    • pp.780-784
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    • 2006
  • We present high aspect ratio air-core solenoid inductors with $100{\mu}m\;and\;200{\mu}m$ tall via structures on Pyrex wafer. The effect of various parameters such as different number of turns, via heights, pitch distance between turns on inductor's radio frequency (RF) characteristics have been studied. The highest Q factor we obtained from various solenoid inductors is 72.8 at 9.7 GHz, which was produced by a 3-turn inductor.

On-chip Inductor Modeling in Digital CMOS technology and Dual Band RF Receiver Design using Modeled Inductor (CMOS 공정을 이용한 on-chip 인덕터 모델링과 이를 이용한 Dual Band RF 수신기 설계)

  • Han Dong Ok;Choo Sung Joong;Lim Ji Hoon;Choi Seung Chul;Lee Seung Woong;Park Jung Ho
    • Proceedings of the IEEK Conference
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    • 2004.06a
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    • pp.221-224
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    • 2004
  • This paper has researched on-chip spiral inductor in digital CMOS technology by modeling physical structure based on foundry parameter. To show the possibility of its application to RF design, we designed dual band RF front-end receiver. The simulated receiver have gain of 23/23.5 dB and noise figure of 2.8/3.36 dB at 2.45/5.25 GHz, respectively. It occupies $16mm^2$ in $0.25{\mu}m$ CMOS with 5 metal layer.

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