• 제목/요약/키워드: Chip Flow

검색결과 315건 처리시간 0.025초

차세대 반도체 펩을 위한 육각형 물류 구조의 설계 (Hexagonal Material Flow Pattern for Next Generation Semiconductor Fabrication)

  • 정재우;서정대
    • 대한산업공학회지
    • /
    • 제36권1호
    • /
    • pp.42-51
    • /
    • 2010
  • The semiconductor industry is highly capital and technology intensive. Technology advancement on circuit design and process improvement requires chip makers continuously to invest a new fabrication facility that costs more than 3 billion US dollars. Especially major semiconductor companies recently started to discuss 450mm fabrication substituting existing 300mm fabrication of which facilities were initiated to build in 1998. If the plan is consolidated, the yield of 450mm facility would be more than doubled compared to existing 300mm facility. In steps of this important investment, facility layout has been acknowledged as one of the most important factors to be competitive in the market. This research proposes a new concept of semiconductor facility layout using hexagonal floor plan and its compatible material flow pattern. The main objective of this proposal is to improve the productivity of the unified layout that has been popularly used to build existing facilities. In this research, practical characteristics of the semiconductor fabrication are taken into account to develop a new layout alternative based on the analysis of Chung and Tanchoco (2009). The performance of the proposed layout alternative is analyzed using computer simulation and the results show that the new layout alternative outperforms the existing layout alternative, unified layout. However, a few questions on space efficiency to the new alternative were raised in communication with industry practitioners. These questions are left for a future study.

고압 쿨런트 펌프의 막힘 방지를 위한 사이클론 타입 필터 (Cyclone Type Filter for Preventing Clogging of High Pressure Coolant Pump)

  • 김준환;강지훈;강성기
    • 한국생산제조학회지
    • /
    • 제24권6호
    • /
    • pp.599-604
    • /
    • 2015
  • Currently, the coolant system in industrial sites is an efficient process to keep clean cutting oils. However, the damage to a pump occurs due to a chip and debris when inhaled into the pump, and thus problems such as the reduction of both efficiency and lifespan might arise. In this study, a new type of filter was developed in order to primarily prevent the damage from the pump impeller and make it unnecessary to have the replacement and cleaning at the same time. This study found the problem reducing the suction volumetric efficiency and cavitation when inhaled, and conducted a method to solve the problem compared to the result of fluid analysis according to two velocity conditions. As a result, this study achieved the effect of lowering the pressure and meeting the suction flow rate by connecting the four filters.

실리콘 웨이퍼 상에 제작된 미소 유로에서의 유동특성 (Flow Characteristics in a Microchannel Fabricated on a Silicon Wafer)

  • 김형우;원찬식;정시영;허남건
    • 대한기계학회논문집B
    • /
    • 제25권12호
    • /
    • pp.1844-1852
    • /
    • 2001
  • Recent developments in microfluidic devices based on microelectromechanical systems (MEMS) technique find many practical applications, which include electronic chip cooling devices, power MEMS devices, micro sensors, and bio-medical devices among others. For the design of such micro devices, flows characteristics inside a microchannel have to be clarified which exhibit somewhat different characteristics compared to conventional flows in a macrochannel. In the present study microchannels of various hydraulic diameters are fabricated on a silicon wafer to study the pressure drop characteristics. The effect of abrupt contraction and expansion is also studied. It is found from the results that the friction factor in a straight microchannel is about 15% higher than that in a conventional macrochannel, and the loss coefficients in abrupt expansion and contraction are about 10% higher than that obtained through conventional flow analysis.

Count-Min HyperLogLog : 네트워크 빅데이터를 위한 카디널리티 추정 알고리즘 (Count-Min HyperLogLog : Cardinality Estimation Algorithm for Big Network Data)

  • 강신정;양대헌
    • 정보보호학회논문지
    • /
    • 제33권3호
    • /
    • pp.427-435
    • /
    • 2023
  • 카디널리티 추정은 실생활의 많은 곳에서 사용되며, 큰 범위의 데이터를 처리하는 데 근본적 문제이다. 인터넷이 빅데이터의 시대로 넘어가며 데이터의 크기는 점점 커지고 있지만, 작은 온칩 캐시 메모리만을 이용하여 카디널리티 추정이 이뤄진다. 메모리를 효율적으로 사용하기 위해서, 지금까지 많은 방법이 제안되었다. 그러나, 이러한 알고리즘에서는 estimator 간의 노이즈 발생으로 인해 정확도가 떨어지는 일이 발생한다. 이 논문에서는 노이즈를 최소화하는데 중점을 뒀다. 우리는 여러 개의 데이터 구조를 제안하여 각 estimator가 데이터 구조 수만큼의 추정값을 가지고, 이 중 가장 작은 값을 선택하여 노이즈를 최소화한다. 실험을 통해 이 방법이 이전의 가장 좋은 방법과 비교했을 때, 플로우당 1 bit와 같은 작은 메모리를 사용하면서 더 좋은 성능을 보이는 것을 확인했다.

2次元 輪곽制御 를 위한 直線 및 圓통補間 (Linear and Circular Interpolation for 2-Dimensional Contouring Control)

  • 이봉진
    • 대한기계학회논문집
    • /
    • 제6권4호
    • /
    • pp.341-345
    • /
    • 1982
  • The interpolator is usually built in hardware (logic circuitry), and the interpolator fabricated in a single LSI chip is recently made use of in most NC controllers, making the system more compact. However, the LSI interpolator not only has the technical difficulties but also requires high cost, in its fabrication. To solve these problems, we tried to find the method of interpolation by software, and succeeded in developing a program which, executed by INTEL's 8085 microprocessor, can distribute the input pulses of up to 4.0 [Kpps] for the linear interpolation and 3.0 [Kpps] for the circular interpolation. This paper presents the algorithm used to reduce the execution time and the flow chart of the interpolation program, and also shows the possibility of software interpolation. The interpolation program designed in assembly language is presented in the appendix.

Static Timing Analysis (STA) 기법을 이용한 Clock Tree Synthesis (CTS) 최적화에 관한 연구 (Pre-layout Clock Analysis with Static Timing Analysis Algorithm to Optimize Clock Tree Synthesis)

  • 박주현;류성민;장명수;최세환;최규명;조준동;공정택
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
    • /
    • pp.391-393
    • /
    • 2004
  • For performance and stability of a synchronized system, we need an efficient Clock Tree Synthesis(CTS) methodology to design clock distribution networks. In a system-on-a-chip(SOC) design environment, CTS effectively distributes clock signals from clock sources to synchronized points on layout design. In this paper, we suggest the pre-layout analysis of the clock network including gated clock, multiple clock, and test mode CTS optimization. This analysis can help to avoid design failure with potential CTS problems from logic designers and supply layout constraints so as to get an optimal clock distribution network. Our new design flow including pre-layout CTS analysis and structural violation checking also contributes to reduce design time significantly.

  • PDF

미세형상가공시 센서융합을 이용한 공구 마멸 및 파손 메커니즘 검출 (The estimation of tool wear and fracture mechanism using sensor fusion in micro-machining)

  • 임정숙;왕덕현;김원일;이윤경
    • 한국공작기계학회:학술대회논문집
    • /
    • 한국공작기계학회 2002년도 춘계학술대회 논문집
    • /
    • pp.245-250
    • /
    • 2002
  • A successful on-line monitoring system for conventional machining operations has the potential to reduce cost, guarantee consistency of product quality, improve productivity and provide a safer environment for the operator. In fee-shape machining, typical signs of tool problems such as vibration, noise, chip flow characteristics and visual signs are almost unnoticeable without the use of special equipment. These characteristics increase the importance of automatic monitoring in fine-shape machining; however, sensing and interpretation of signals are more complex. In addition, the shafts of the micro-tools break before the typical extensive cutting edge of the tool gets damaged. In this study, the existence of a relationship between the characteristics of the cutting force and tool usage was investigated, and tool breakage detection algorithm was developed and the fellowing results are obtained. In data analysis, didn't use a relative error compare which mainly used in established experiment and investigated tool breakage detection algorithm in time domain which can detect AE and cutting force signals more effective and accurate.

  • PDF

3차원 절삭가공에서의 2자유도 채터안정성 해석

  • 김병룡;강명창;김정석
    • 한국정밀공학회:학술대회논문집
    • /
    • 한국정밀공학회 2001년도 추계학술대회 논문집
    • /
    • pp.31-35
    • /
    • 2001
  • Three dimensional dynamic cutting can be postulated as an equivalent orthogonal dynamic cutting through the plane containing both the cutting vector and the chip flow velocity vector in cutting process. An analytical expression of dynamic cutting force is obtained from the cutting parameters determined by the static three dimensional cutting experiments. Particular attention is paid to the energy supplied to the vibration of the tool behind the vertical vibration and the direction. The phase lag of the horizontal vibration of the tool behind the vertical vibration and the direction angel of the fluctuating cutting force must be regarded in point of stability limits. Chatter vibration can effectively be suppressed by enlarging the dynamic rigidity of the cutting system in the vertical cutting force direction. A good agreement is found between the stability limits predicted by theory and the critical width of cut determined by experiments.

마이크로 혼합기와 반응기로 구성된 DNA 결찰용 바이오칩에 관한 연구 (A Study About Biochip Combined with Micro Mixer and Reactor for DNA Ligation)

  • 강도형;안유민;황승용
    • 대한기계학회논문집A
    • /
    • 제32권8호
    • /
    • pp.624-632
    • /
    • 2008
  • In this research, we developed new PDMS-glass based microbiochip consisted of the micromixer and microreactor for DNA ligation. The micromixer was composed of a straight channel integrated with nozzles and pillars, and the microreactor was composed of a serpentine channel. We coated the PDMS chip surface with the 0.25wt.% PVP solution to prevent the bubble generation which was caused by the hydrophobicity of the PDMS. The new micomixer was passive type and the mixing was enhanced by a convective diffusion using the nozzle and pillar. The 10.33mm long micromixer showed the good mixing efficiency of 87.7% at 500 l/min flow rate. We could perform the DNA ligation successfully in the microbiochip, and the ligation time was shortened from 4 hours in conventional laboratory method to 5 min in the microbiochip.

초정밀 고속가공 공정에서의 변형율속도를 고려한 전산 시뮬레이션 해석에 관한 연구 (A Study on Computational Analysis of Ultraprecsion High-speed Machining Process Considering the Strain Rate Effect)

  • 신보성;제태진
    • 한국기계가공학회지
    • /
    • 제5권2호
    • /
    • pp.3-9
    • /
    • 2006
  • HSM(High-speed Machining) is widely used in rapid manufacturing of precision products and molds of various materials. Improvement in cutting efficiency is one of the important subjects in the HSM process. To analyse the dynamic behavior during a very short cutting time, the computational analysis code, LS-DYNA3D, was employed for the simulation of the mechanism of HSM for aluminium 7075. This cutting mechanism includes some difficult points in simulation, for example, material and geometrical non-linearity, high-speed dynamic impact, contact with friction, etc. In this paper, a finite element model considering the strain rate effect is proposed to predict the cutting phenomena such as chip deformation, strain and stress distributions, which will help us to design the HSM process.

  • PDF