• Title/Summary/Keyword: Chip Breaking

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Practical Biasing Power Analysis breaking Side Channel Attack Countermeasures based on Masking-Shuffling techniques (마스킹-셔플링 부채널 대응법을 해독하는 실용적인 편중전력분석)

  • Cho, Jong-Won;Han, Dong-Guk
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.9
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    • pp.55-64
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    • 2012
  • Until now, Side Channel Attack has been known to be effective to crack decrypt key such as smart cards, electronic passports and e-ID card based on Chip. Combination of Masking and shuffling methods have been proposed practical countermeasure. Newly, S.Tillich suggests biased-mask using template attack(TA) to attack AES with masking and shuffling. However, an additional assumption that is acquired template information previously for masking value is necessary in order to apply this method. Moreover, this method needs to know exact time position of the target masking value for higher probability of success. In this paper, we suggest new practical method called Biasing Power Analysis(BPA) to find a secret key of AES based on masking-shuffling method. In BPA, we don't use time position and template information from masking value. Actually, we do experimental works of BPA attack to 128bit secret key of AES based on masking-shuffling method performed MSP430 Chip and we succeed in finding whole secret key. The results of this study will be utilized for next-generation ID cards to verify physical safety.

A Study on New Twist-Diamond Wire Characteristics for Improving Processing Performance (트위스트 다이아몬드 와이어의 성능향상을 위한 특성평가에 관한 연구)

  • Park, Chang-Yong;Kweon, Hyun-Kyu;Peng, Bo;Jung, Bong-Gyo
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.15 no.1
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    • pp.26-33
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    • 2016
  • In this study, a new method to develop a fixed diamond wire for silicon wafer machining by the multi-wire cutting method was developed. The new twist diamond wire has improved performance with high breaking strength and chip flutes structure. According to these characteristics, the new twist diamond wire can be used in the higher speed multi-wire cutting process with a long lifetime. Except the design of the new structure, the twist diamond wire is coating by electroless-electroplating process. It is good for reducing breakage and the falling-off of diamond grains. Based on the silicon material removal mechanism and performance of the wire-cutting machine, the optimal processing condition of the new twist diamond wire has been derived via mathematical analysis. At last, through the tensile testing and the machining experiments, the performance of the twist diamond wire has been obtained to achieve the development goals and exceed the single diamond wire.

80μW/MHz 0.68V Ultra Low-Power Variation-Tolerant Superscalar Dual-Core Application Processor

  • Kwon, Youngsu;Lee, Jae-Jin;Shin, Kyoung-Seon;Han, Jin-Ho;Byun, Kyung-Jin;Eum, Nak-Woong
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.2
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    • pp.71-77
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    • 2015
  • Upcoming ground-breaking applications for always-on tiny interconnected devices steadily demand two-fold features of processor cores: aggressively low power consumption and enhanced performance. We propose implementation of a novel superscalar low-power processor core with a low supply voltage. The core implements intra-core low-power microarchitecture with minimal performance degradation in instruction fetch, branch prediction, scheduling, and execution units. The inter-core lockstep not only detects malfunctions during low-voltage operation but also carries out software-based recovery. The chip incorporates a pair of cores, high-speed memory, and peripheral interfaces to be implemented with a 65nm node. The processor core consumes only 24mW at 350MHz and 0.68V, resulting in power efficiency of $80{\mu}W/MHz$. The operating frequency of the core reaches 850MHz at 1.2V.

Design of Small-Area and High-Reliability 512-Bit EEPROM IP for UHF RFID Tag Chips (UHF RFID Tag Chip용 저면적·고신뢰성 512bit EEPROM IP 설계)

  • Lee, Dong-Hoon;Jin, Liyan;Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.2
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    • pp.302-312
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    • 2012
  • In this paper, small-area and high-reliability design techniques of a 512-bit EEPROM are designed for UHF RFID tag chips. For a small-area technique, there are a WL driver circuit simplifying its decoding logic and a VREF generator using a resistor divider instead of a BGR. The layout size of the designed 512-bit EEPROM IP with MagnaChip's $0.18{\mu}m$ EEPROM is $59.465{\mu}m{\times}366.76{\mu}m$ which is 16.7% smaller than the conventional counterpart. Also, we solve a problem of breaking 5V devices by keeping VDDP voltage constant since a boosted output from a DC-DC converter is made discharge to the common ground VSS instead of VDDP (=3.15V) in getting out of the write mode.