• 제목/요약/키워드: Charge trapping

검색결과 142건 처리시간 0.026초

Controlled Charge Carrier Transport and Recombination for Efficient Electrophosphorescent OLED

  • Chin, Byung-Doo;Choi, Yu-Ri;Eo, Yong-Seok;Yu, Jai-Woong;Baek, Heume-Il;Lee, Chang-Hee
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1418-1420
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    • 2008
  • In this paper, the light emitting efficiency, spectrum, and the lifetime of the phosphorescent devices, whose emission characteristics are strongly dominated not only by the energy transfer but also by the charge carrier trapping induced by the emissive dopant, are explained by differences in the energy levels of the host, dopant, and nearby transport layers. On the basis of our finding on device performance and photocurrent measurement data by time-of-flight (TOF), we investigated the effect of the difference of carrier trapping dopant and properties of the host materials on the efficiency roll-off of phosphorescent organic light emitting diode (OLED), along with a physical interpretation and practical design scheme, such as a multiple host system, for improving the efficiency and lifetime of devices.

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4H-SiC Planar MESFET for Microwave Power Device Applications

  • Na, Hoon-Joo;Jung, Sang-Yong;Moon, Jeong-Hyun;Yim, Jeong-Hyuk;Song, Ho-Keun;Lee, Jae-Bin;Kim, Hyeong-Joon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권2호
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    • pp.113-119
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    • 2005
  • 4H-SiC planar MESFETs were fabricated using ion-implantation on semi-insulating substrate without recess gate etching. A modified RCA method was used to clean the substrate before each procedure. A thin, thermal oxide layer was grown to passivate the surface and then a thick field oxide was deposited by CVD. The fabricated MESFET showed good contact properties and DC/RF performances. The maximum oscillation frequency of 34 GHz and the cut-off frequency of 9.3 GHz were obtained. The power gain was 10.1 dB and the output power of 1.4 W was obtained for 1 mm-gate length device at 2 GHz. The fabricated MESFETs showed the charge trapping-free characteristics and were characterized by the extracted small-signal equivalent circuit parameters.

Pt 나노입자와 Hybrid Pt-$SiO_2$ 나노입자의 합성과 활용 및 입자박막 제어 (Synthesis and application of Pt and hybrid Pt-$SiO_2$ nanoparticles and control of particles layer thickness)

  • 최병상
    • 한국전자통신학회논문지
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    • 제4권4호
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    • pp.301-305
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    • 2009
  • Pt 나노입자의 합성과 이를 이용한 hybrid Pt-$SiO_2$ 나노입자의 합성을 성공적으로 수행하였으며, self-assembled Pt nanoparticles monolayer를 charge trapping layer로 활용하는 metal-oxide-semiconductor(MOS) type memory의 한 예로 non-volatile memory(NVM)의 응용을 보임으로써 나노입자의 활용 가능성을 보이고, 또한, hybrid Pt-$SiO_2$ 나노입자 박막 층의 제어를 통한 MOS type memory device에의 보다 더 넓은 활용 가능성을 보이고자 하였다.

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테라비트급 나노 스케일 SONOS 플래시 메모리 제작 및 소자 특성 평가 (Fabrication and Device Performance of Tera Bit Level Nano-scaled SONOS Flash Memories)

  • 김주연;김문경;김병철;김정우;서광열
    • 한국전기전자재료학회논문지
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    • 제20권12호
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    • pp.1017-1021
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    • 2007
  • To implement tera bit level non-volatile memories of low power and fast operation, proving statistical reproductivity and satisfying reliabilities at the nano-scale are a key challenge. We fabricate the charge trapping nano scaled SONOS unit memories and 64 bit flash arrays and evaluate reliability and performance of them. In case of the dielectric stack thickness of 4.5 /9.3 /6.5 nm with the channel width and length of 34 nm and 31nm respectively, the device has about 3.5 V threshold voltage shift with write voltage of $10\;{\mu}s$, 15 V and erase voltage of 10 ms, -15 V. And retention and endurance characteristics are above 10 years and $10^5$ cycle, respectively. The device with LDD(Lightly Doped Drain) process shows reduction of short channel effect and GIDL(Gate Induced Drain Leakage) current. Moreover we investigate three different types of flash memory arrays.

고전압 SiO2 절연층 nMOSFET n+ 및 p+ poly Si 게이트에서의 Positive Bias Temperature Instability 열화 메커니즘 분석 (Analysis of Positive Bias Temperature Instability Degradation Mechanism in n+ and p+ poly-Si Gates of High-Voltage SiO2 Dielectric nMOSFETs)

  • 윤여혁
    • 한국정보전자통신기술학회논문지
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    • 제16권4호
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    • pp.180-186
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    • 2023
  • 본 논문은 4세대 VNAND 공정으로 만들어진 고전압 SiO2 절연층 nMOSFET의 n+ 및 p+ poly-Si 게이트에서의 positive bias temperature instability(PBTI) 열화에 대해 비교하고 각각의 메커니즘에 대해 분석한다. 게이트 전극 물질의 차이로 인한 절연층의 전계 차이 때문에 n+/nMOSFET의 열화가 p+/nMOSFET의 열화보다 더 클 것이라는 예상과 다르게 오히려 p+/nMOSFET의 열화가 더 크게 측정되었다. 원인을 분석하기 위해 각각의 경우에 대해 interface state와 oxide charge를 각각 추출하였고, 캐리어 분리 기법으로 전하의 주입과 포획 메커니즘을 분석하였다. 그 결과, p+ poly-Si 게이트에 의한 정공 주입 및 포획이 p+/nMOSFET의 열화를 가속시킴을 확인하였다.

Charge Spreading Effect of Stored Charge on Retention Characteristics in SONOS NAND Flash Memory Devices

  • Kim, Seong-Hyeon;Yang, Seung-Dong;Kim, Jin-Seop;Jeong, Jun-Kyo;Lee, Hi-Deok;Lee, Ga-Won
    • Transactions on Electrical and Electronic Materials
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    • 제16권4호
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    • pp.183-186
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    • 2015
  • This research investigates the impact of charge spreading on the data retention of three-dimensional (3D) silicon-oxide-nitride-oxide-silicon (SONOS) flash memory where the charge trapping layer is shared along the cell string. In order to do so, this study conducts an electrical analysis of the planar SONOS test pattern where the silicon nitride charge storage layer is not isolated but extends beyond the gate electrode. Experimental results from the test pattern show larger retention loss in the devices with extended storage layers compared to isolated devices. This retention degradation is thought to be the result of an additional charge spreading through the extended silicon nitride layer along the width of the memory cell, which should be improved for the successful 3-D application of SONOS flash devices.

Feasibility of ferroelectric materials as a blocking layer in charge trap flash (CTF) memory

  • Zhang, Yong-Jie;An, Ho-Myoung;Kim, Hee-Dong;Nam, Ki-Hyun;Seo, Yu-Jeong;Kim, Tae-Geun
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 추계학술대회 논문집 Vol.21
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    • pp.119-119
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    • 2008
  • The electrical characteristics of Metal-Ferroelectric-Nitride-Oxide-Silicon (MFNOS) structure is studied and compared to the conventional Silicon-Oixde-Nitride-Oxide-Silicon (SONOS) capacitor. The ferroelectric blocking layer is SrBiNbO (SBN with Sr/Bi ratio 1-x/2+x) with the thickness of 200 nm and is fabricated by the RF sputter. The memory windows of MFNOS and SONOS capacitors with sweep voltage from +10 V to -10 V are 6.9 V and 5.9 V, respectively. The effect of ferroelectric blocking layer and charge trapping on the memory window was discussed. The retention of MFNOS capacitor also shows the 10-years and longer retention time than that of the SONOS capacitor. The better retention properties of the MFNOS capacitor may be attributed to the charge holding effect by the polarization of ferroelectric layer.

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Organic Bistable Switching Memory Devices with MeH-PPV and Graphene Oxide Composite

  • Senthilkumar, V.;Kim, Yong Soo
    • Transactions on Electrical and Electronic Materials
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    • 제16권5호
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    • pp.290-292
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    • 2015
  • We have reported about bipolar resistive switching effect on Poly[2-methoxy-5-(2-ethylhexyloxy)-1,4-phenylenevinylene]:Graphene oxide composite films, which are sandwiched between aluminum and indium tin oxide electrodes. In this case, I-V sweep curve showed a hysteretic behavior, which varied according to the polarity of the applied voltage bias. The device exhibited excellent switching characteristics, with the ON/OFF ratio being approximately two orders in magnitude. The device had good endurance (105 cycles without degradation) and long retention time (5 × 103 s) at room temperature. The bistable switching behavior varied according to the trapping and de-trapping of charges on GO sites; the carrier transport was described using the space-charge-limited current (SCLC) model.

Hole trapping in carbon nanotube-polymer composite organic light emitting diodes

  • Woo, H.S.;Czerw, R.;Carroll, D.L.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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    • pp.1047-1052
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    • 2003
  • Controlling carrier transport in light emitting polymers is extremely important for their efficient use in organic opto-electronic devices [1]. Here we show that the interactions between single wall carbon nanotubes (SWNTs) and conjugated polymers can be used to modify the overall mobility of charge carriers within nanotube-polymer nanocomposites. By using a unique, double emitting-organic light emitting diodes (DE-OLEDs) structure. we have characterized the hole transport within electroluminescent nanocomposites (nanotubes in poly (m-phenylene vinylene-co-2,5-dioctoxy-p-phenylene) or PmPV). We have shown using this idea that single devices with color tunability can be fabricated. It is seen that SWNTs in PmPV are responsible for hole trapping, leading to shifts in the emission wavelengths. Our results could lead to improved organic optical amplifiers, semiconducting devices, and displays.

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Red Organic Light-emitting Diodes utilizing Energy Transfer and Charge Trapping

  • Kim, Ju-Seung;Gu, Hal-Bon
    • Transactions on Electrical and Electronic Materials
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    • 제6권3호
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    • pp.91-96
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    • 2005
  • We report the efficient red light-emitting diodes based on the fluorescent dye 4-(dicyanomethylene)-2-i-propyl-6-(1,1,7,7-tetramethyljulolidyl-9-enyl)-4H-pyran (DCJTI) and 5,6,11,12-tetraphenyl naphthacene (rubrene) codoped in the tris(8-hydroxyquinoline)aluminum $(Alq_3)$. Luminance efficiency of 2.2 cd/A with a Commission International De L'Eclairage (CIE) chromaticity coordinate of x, y = (0.640, 0:350) are achieved at the driving current density of $20\;mA/cm^2$. Adding the rubrene to the DCJTI in tris(8-hydroxyquinoline)aluminum $(Alq_3)$, the red color purity and luminance efficiency improved comparing to the DCJTI only doped devices because the rubrene molecules assist the polarization effect of DCJTI by molecular interaction and enhance the energy transfer from $(Alq_3)$ to DCJTI.