• Title/Summary/Keyword: Channel length

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An Error-Resilient Image Compression Base on the Zerotree Wavelet Algorithm (오류에 강인한 제로트리 웨이블릿 영상 압축)

  • 장우영;송환종;손광훈
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.7A
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    • pp.1028-1036
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    • 2000
  • In this paper, an error-resilient image compression technique using wavelet transform is proposed. The zerotree technique that uses properties of statistics, energy and directions of wavelet coefficients in the space-frequency domain shows effective compression results. Since it is highly sensitive to the propagation of channel errors, evena single bit error degrades the whole image quality severely. In the proposed algorithm, the image is encoded by the SPIHT(Set Partitioning in Hierarchical Trees) algorithm using the zerotree coding technique. Encoded bitstreams are partitioned into some blocks using the subband correlations and then fixed-length blocks are made by using the effective bit reorganization algorithm. finally, an effective bit allocation technique is used to limit error propagation in each block. Therefore, in low BER the proposed algorithm shows similar compression performance to the zerotree compression technique and in high BER it shows better performance in terms of PSNR than the conventional methods.

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The Degradation Analysis of Characteristic Parameters by NBTI stress in p-MOS Transistor for High Speed (고속용 p-MOS 트랜지스터에서 NBTI 스트레스에 의한 특성 인자의 열화 분석)

  • Lee, Yong-Jae;Lee, Jong-Hyung;Han, Dae-Hyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.1A
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    • pp.80-86
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    • 2010
  • This work has been measured and analyzed the device degradation of NBTI (Negative Bias Temperature Instability) stress induced the increase of gate-induced-drain-leakage(GIDL) current for p-MOS transistors of gate channel length 0.13 [${\mu}m$]. From the relation between the variation of threshold voltage and subthreshold slop by NBTI stress, it has been found that the dominant mechanism for device degradation is the interface state generation. From the GIDL measurement results, we confined that the EHP generation in interface state due to NBTI stress led to the increase of GIDL current. As a results, one should take care of the increased GIDL current after NBTI stress in the ultra-thin gate oxide device. Also, the simultaneous consideration of reliability characteristics and dc device performance is highly necessary in the stress parameters of nanoscale CMOS communication circuit design.

A Study on TTX Traction Characteristics using Measurement System (계측시스템을 활용한 틸팅열차 추진장치 특성 연구)

  • Han, Young-Jae;Lee, Su-Gil;Park, Choon-Soo;Han, Seong-Ho;Lee, Jun-Seok;Jung, Kwon-Il
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.12
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    • pp.1093-1098
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    • 2007
  • Tilting trains are currently in operation in 13 countries around the world. With the advances in tilting technology, verification of economic efficiency, and changes in economic situations, the introduction of tilting trains will rapidly spread across the globe. The measurement system is composed of the industrial computers installed in the console and the measurement racks mounted on each car. It is utilized to accumulate the data by the communication card and the optical cable. The optical cable and power cable are coupled at the connector located in joint of train to make easy to disconnect car each other. The signal conditioner is designed to choose and to extend the channel for each sensor readily. The sensor measurement rack has adopted as decentralization method. It is installed in each car to minimize the cable length. In also, it is manufactured based on 19"rack and covered to protect the cable. In this study, the programs for measurement and analysis were also developed to understand the traction system characteristics of TTX. Using this measurement system, we studied that acceleration test, re-powering test, and gradually powering test. The acceleration performance of TTX is 1.735 km/h/s, and it is inner standard value. The notch test result from 1 to 7 steps, DC link voltage is under standard value, and the output electric current of inverter is controlled normally. From the test results, we saw the performances of the traction systems are normal.

A Capillary Electrochromatographic Microchip Packed with Self-Assembly Colloidal Carboxylic Silica Beads

  • Jeon, In-Sun;Kim, Shin-Seon;Park, Jong-Man
    • Bulletin of the Korean Chemical Society
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    • v.33 no.4
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    • pp.1135-1140
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    • 2012
  • An electrochromatographic microchip with carboxyl-group-derivatized mono-disperse silica packing was prepared from the corresponding colloidal silica solution by utilizing capillary action and self-assembly behavior. The silica beads in water were primed by the capillary action toward the ends of cross-patterned microchannel on a cyclic olefinic copolymer (COC) substrate. Slow evaporation of water at the front of packing promoted the self-assembled packing of the beads. After thermally binding a cover plate on the chip substrate, reservoirs for sample solutions were fabricated at the ends of the microchannel. The packing at the entrances of the microchannel was silver coated to fix utilizing an electroless silver-plating technique to prevent the erosion of the packed structure caused by the sudden switching of a high voltage DC power source. The electrochromatographic behavior of the microchip was explored and compared to that of the microchip with bare silica packing in basic borate buffer. Electrophoretic migration of Rhodamine B was dominant in the microchip with the carboxyl-derivatized silica packing that resulted in a migration approximated twice as fast, while the reversible adsorption was dominant in the bare silica-packed microchip. Not only the faster migration rates of the negatively charged FITC-derivatives of amino acids but also the different migration due to the charge interaction at the packing surface were observed. The electrochromatographic characteristics were studied in detail and compared with those of the bare silica packed microchip in terms of the packing material, the separation potential, pH of the running buffer, and also the separation channel length.

The Impact of Characteristic Velocities Considering Geomorphological Dispersion on Shape of Instantaneous Unit Hydrograph (지형학적 분산을 고려한 특성유속이 순간단위도 형상에 미치는 영향)

  • Choi, Yong-Joon;Kim, Joo-Cheol;Hwang, Man-Ha
    • Journal of Korea Water Resources Association
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    • v.43 no.4
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    • pp.399-408
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    • 2010
  • The sensitivity of Nash model parameters is analyzed about characteristic velocities considering geomorphological dispersion in the present study. And changing shape of IUH compared and analyzed as variation of characteristic velocities through numerical experiment. Application watersheds are selected 4 subwatersheds which are located at main stream of Bocheong basin. The mean and variance of hillslope and stream path length are estimated in each watershed with GIS. And Nash model parameters are estimated with moments of path lengths and characteristic velocities. The changing trend about IUH which is derived Nash model parameters are compared as variation of characteristic velocities. The Major results of this study are summarized as follows. The Nash model parameters sensitively present changes about hillslope characteristic velocity. And the effect of the peak discharge and shape of recession in IUH dominate with hillslope's characteristic velocity, the effect of the peak time and shape of ascension in IUH dominate with channel's characteristic velocity.

Compressible Simulation of Rotor-Stator Interaction in Pump-Turbines

  • Yan, Jianping;Koutnik, Jiri;Seidel, Ulrich;Hubner, Bjorn
    • International Journal of Fluid Machinery and Systems
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    • v.3 no.4
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    • pp.315-323
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    • 2010
  • This work investigates the influence of water compressibility on pressure pulsations induced by rotor-stator interaction (RSI) in hydraulic machinery, using the commercial CFD solver ANSYS-CFX. A pipe flow example with harmonic velocity excitation at the inlet plane is simulated using different grid densities and time step sizes. Results are compared with a validated code for hydraulic networks (SIMSEN). Subsequently, the solution procedure is applied to a simplified 2.5-dimensional pump-turbine configuration in prototype with different speeds of sound as well as in model scale with an adapted speed of sound. Pressure fluctuations are compared with numerical and experimental data based on prototype scale. The good agreement indicates that the scaling of acoustic effects with an adapted speed of sound works well. With respect to pressure fluctuation amplitudes along the centerline of runner channels, incompressible solutions exhibit a linear decrease while compressible solutions exhibit sinusoidal distributions with maximum values at half the channel length, coinciding with analytical solutions of one-dimensional acoustics. Furthermore, in compressible simulation the amplification of pressure fluctuations is observed from the inlet of stay vane channels to the spiral case wall. Finally, the procedure is applied to a three-dimensional pump configuration in model scale with adapted speed of sound. Normalized Pressure fluctuations are compared with results from prototype measurements. Compared to incompressible computations, compressible simulations provide similar pressure fluctuations in vaneless space, but pressure fluctuations in spiral case and penstock may be much higher.

Implementation of a High Speed GEM frame Synchronization Circuit in the G-PON TC Sublayer Payload (G-PON TC 계층 유료부하 내에서 고속 GEM 프레임 동기회로 구현)

  • Chung, Hae;Kwon, Young-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.5B
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    • pp.469-479
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    • 2009
  • The GEM frame is used a mean to deliver the variable length user data and consists of the header and the payload in the G-PON system. The HEC field of header protects contents of the header and is used to maintain GEM frame synchronization at the same time. When an LCDG (Loss of GEM Channel Delineation) occurs while receiving frames, the receiver have to discard corrupted frames until acquiring the synchronization again. Accordingly, high-speed synchronization method is required to minimize the frame loss. In this paper, we suggest not only a main state machine but a sub-state machine to reduce the frame loss when undetectable errors occurred in the GEM header. Also, we provide a more efficient and fast parallel structure to detect the starting point of the header. Finally, the proposed method is implemented with the FPGA and verified by the logic analyzer.

Performance Comparison and Improvement of STDR/SSTDR Schemes Using Various Sequences (여러 가지 수열을 적용한 STDR/SSTDR 기법의 성능 비교 및 개선)

  • Han, Jeong Jae;Park, So Ryoung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.11
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    • pp.637-644
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    • 2014
  • This paper investigates the detection performance of fault location using STDR(sequence time domain reflectometry) and SSTDR(spread spectrum time domain reflectometry) with various length and types of sequences, and then, proposes an improved detection technique by eliminating the injected signal in SSTDR. The detection error rates are compared and analyzed in power line channel model with various fault locations, fault types, and spreading sequences such as m-sequence, binary Barker sequence, and 4-phase Frank sequence. It is shown that the proposed technique is able to improve the detection performance obviously when the reflected signal is weak or the fault location is extremely close.

Mixed Convection in Channels of an Electronic Cabinet (전자장비 채널에서의 혼합대류에 관한 연구)

  • 이재헌;남평우;박상동;조성환
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.13 no.4
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    • pp.771-779
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    • 1989
  • Numerical analysis by SIMPLE algorithm has been performed to predict the characteristics of flow and heat transfer in channels between the printed circuit boards of an electronic cabinet. It is assumed that the electronic parts release uniform heat flux per unit axial length to the cooling air. The air flow between channels is assumed fully developed laminar, incompressible, and mixed convective. In this study, the electronic parts are mounted on both sides of the prinked circuit boards by two kinds of configuration such as the zig-zag and the symmetric one. The Rayleigh numbers ranging from 0 to 10$^{6}$ are considered to predict the characteristics of the main flow and the secondary flow occurred by natural convection, the temperature distribution in channel, the heat transfer rate from heated electronic parts and the increase of friction factor by natural convection. As the results of numerical calculation, several conclusions are drawn as follows. The influence of natural convection on the flow characteristics appears strong when the Rayleigh number is above 10$^{4}$. The main axial flow rate decreases by a half or more at the Rayleigh number of 10$^{6}$ . Although the friction factor increases as Rayleigh number increases, the increasing rate of heat transfer is higher than that of the friction factor. The cooling efficiency of the zig-zig-configuration is superior to that of the symmetric configuration at same Rayleigh number.

Design of Low Dropout Regulator using self-cascode structure (셀프-캐스코드 구조를 적용한 LDO 레귤레이터 설계)

  • Choi, Seong-Yeol;Kim, Yeong-Seuk
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.7
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    • pp.993-1000
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    • 2018
  • This paper proposes a low-dropout voltage regulator(LDO) using self-cascode structure. The self-cascode structure was optimized by adjusting the channel length of the source-side MOSFET and applying a forward voltage to the body of the drain-side MOSFET. The self-cascode of the input differential stage of the error amplifier is optimized to give higher transconductance, but the self-cascode of the output stage is optimized to give higher output resistance, The proposed LDO using self-cascode structure was designed by a $0.18{\mu}m$ CMOS technology and simulated using SPECTRE. The load regulation of the proposed LDO regulator was 0.03V/A, whereas that of the conventional LDO was 0.29V/A. The line regulation of the proposed LDO regulator was 2.23mV/V, which is approximately three times improvement compared to that of the conventional LDO. The transient response of the proposed LDO regulator was 625ns, which is 346ns faster than that of the conventional LDO.