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Implementation of a High Speed GEM frame Synchronization Circuit in the G-PON TC Sublayer Payload  

Chung, Hae (금오공과대학교 전자통신과 통신망연구실)
Kwon, Young-Jin (금오공과대학교 전자통신과 통신망연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.34, no.5B, 2009 , pp. 469-479 More about this Journal
Abstract
The GEM frame is used a mean to deliver the variable length user data and consists of the header and the payload in the G-PON system. The HEC field of header protects contents of the header and is used to maintain GEM frame synchronization at the same time. When an LCDG (Loss of GEM Channel Delineation) occurs while receiving frames, the receiver have to discard corrupted frames until acquiring the synchronization again. Accordingly, high-speed synchronization method is required to minimize the frame loss. In this paper, we suggest not only a main state machine but a sub-state machine to reduce the frame loss when undetectable errors occurred in the GEM header. Also, we provide a more efficient and fast parallel structure to detect the starting point of the header. Finally, the proposed method is implemented with the FPGA and verified by the logic analyzer.
Keywords
G-PON; FTTH; GEM Frame; Synchronization; HEC;
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